参数资料
型号: ZXLB1600X10TC
厂商: Diodes Inc
文件页数: 3/16页
文件大小: 0K
描述: IC REG BST FLYBK ADJ 10MA 10MSOP
标准包装: 4,000
类型: 升压,反激式
输出类型: 可调式
输出数: 1
输出电压: 1.6 V ~ 28 V
输入电压: 1.6 V ~ 5.5 V
频率 - 开关: 最高 500kHz
电流 - 输出: 10mA
同步整流器:
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
供应商设备封装: 10-MSOP
LAST TIME BUY
ZXLB1600
ELECTRICAL CHARACTERISTICS (Cont.)
Test conditions unless otherwise stated: V IN = 3.0V, T AMB = 25 ° C
Symbol
Parameter
Conditions
Min Typ
Max
Units
Output voltage control by dc voltage applied to ‘ADJ ’ pin
V ADJ (nom)
V ADJ
I ADJ
Internal reference voltage
Temperature coefficient of V ADJ
External overdrive voltage range
on ‘ADJ ’ pin for output voltage
control
Input current into V ADJ pin
‘ADJ ’ pin floating, ‘EN ’= V IN
0.5<V ADJ < V ADJ (NOM)
0.5
1.23
40
V ADJ
(NOM)
-10
V
ppm/ C
V
A
V SENSE
Default Output voltage
‘ADJ ’ pin floating, ‘EN ’= V IN
27
29
V
Output voltage control by PWM signal applied to ‘EN ’ input
? T/T
f LPF
A LPF
PWM duty cycle range at ‘EN ’
input
Internal low pass filter cut-off
frequency
Filter attenuation
10kHz (5) < f < 100kHz, V ENH =V IN
f=30kHz
40
4
52.5
100
%
kHz
dB
Internal voltage setting resistors for output voltage
R1
R2
Ref. Block diagram
317
6.93
k
M
Enable input
V ENL
Low level Input voltage
Device in shutdown
0.4
V
V ENH
I ENL
I ENH
T EN(hold)
High level Input voltage
Low level input current
High level input current
Enable active hold time (6)
Device active
V EN =0V
V EN =V IN
V EN switched from high to low
1.4
120
Vin
-100
100
V
nA
nA
s
Low-battery detection circuit
V LBT
Detection threshold
V IN falling
1.94
2.02
V
Temperature coefficient of V BLT
20
ppm/ C
V BLHYS
Ref (LBD)
V LBT (max)
Hysteresis
Internal reference voltage
Maximum voltage on LBT pin
V IN rising
20
1.21
mV
V
V in -0.5 V
I BLOL
V BLOL
I BLOH
V BLOH
Low level output current
Low level output voltage
High level output current
High level output voltage
Output ‘on ’
I BLOL = 0.5mA
Output ‘off ’ , V BLOH = 29V
Output ‘off ’
1
0.4
2
29
mA
V
A
V
Internal voltage setting resistors for low-battery detection circuit
R3
R4
Ref. block diagram
1.56
2.44
M
M
Note:
5)
6)
This is the minimum PWM frequency to maintain a continuous output. Lower frequencies can be used, but will result in gated operation of
the device i.e. device enters shutdown when EN is low (see Note 6).
This is the time for which the device remains active after the EN pin has been driven low. This delay allows a continuous output to be
maintained during PWM mode operation at frequencies higher than 10kHz.
ISSUE 3 - SEPTEMBER 2003
3
SEMICONDUCTORS
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