参数资料
型号: 25AA512T-I/SM
厂商: Microchip Technology
文件页数: 16/36页
文件大小: 0K
描述: IC EEPROM 512KBIT 20MHZ 8SOIC
标准包装: 2,100
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 512K (64K x 8)
速度: 20MHz
接口: SPI 3 线串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.209",5.30mm 宽)
供应商设备封装: 8-SOIJ
包装: 带卷 (TR)
其它名称: 25AA512T-I/SMTR
25AA512
2.9
SECTOR ERASE
The SECTOR ERASE instruction will erase all bits
(FFh) inside the given sector. A Write Enable ( WREN )
instruction must be given prior to attempting a SECTOR
ERASE . This is done by setting CS low and then clock-
ing out the proper instruction into the 25AA512. After
all eight bits of the instruction are transmitted, the CS
must be brought high to set the write enable latch.
The SECTOR ERASE instruction is entered by driving
CS low, followed by the instruction code (Figure 2-9)
and two address bytes. Any address inside the sector
to be erased is a valid address.
CS must then be driven high after the last bit of the
address or the SECTOR ERASE will not execute. Once
the CS is driven high the self-timed SECTOR ERASE
cycle is started. The WIP bit in the STATUS register
can be read to determine when the SECTOR ERASE
cycle is complete.
If a SECTOR ERASE instruction is given to an address
that has been protected by the Block Protect bits (BP0,
BP1) then the sequence will be aborted and no erase
will occur.
See Table 2-3 for Sector Addressing.
FIGURE 2-9:
CS
SECTOR ERASE SEQUENCE
0
1
2
3
4
5
6
7
8
9 1 0 11
2 1 2 2 2 3
SCK
Instruction
16-bit Address
SI
0
1
0
0
0
0
1
0 15 14 13 12
2
1
0
High-Impedance
SO
DS22021F-page 16
? 2010 Microchip Technology Inc.
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