参数资料
型号: 4320-DKDB4
厂商: Silicon Laboratories Inc
文件页数: 12/36页
文件大小: 0K
描述: KIT DEV TEST EZRADIO SI4320 RX
标准包装: 1
附件类型: 测试卡,接收器,915MHz
适用于相关产品: EZRadio?
Si4320
Control Commands
Control Word
Related Parameters/Functions
Related Control Bits
1
2
3
4
5
6
7
8
9
10
11
12
Configuration Setting Command
Frequency Setting Command
Receiver Setting Command
Wake-up Timer Command
Low Duty-Cycle Command
Low Battery Detector and Clock Divider
Command
AFC Control Command
Data Filter Command
Data Rate Command
Output and FIFO Command
Reset Mode Command
Status Read Command
Frequency band, low battery detector, wake-up timer,
crystal oscillator load capacitance, baseband filter
bandwidth, clock output
Set the frequency of the local oscillator
Set VDI source, LNA gain, RSSI threshold,
Wake-up time period
Set duty-cycle, enable low duty-cycle mode.
Set LBD threshold voltage and microcontroller clock
division ratio
Set AFC parameters
Set data filter type, clock recovery parameters
Bit rate
Set FIFO IT level, FIFO start control, FIFO enable
and FIFO fill enable
Enable / disable sensitive reset
Read status information
b1 to b0, eb, et, ex, x3 to
x0, i2 to i0, dc
f11 to f0
d1 to d0, g1 to g0, r2 to
r0, en
r4 to r0, m7 to m0
d6 to d0, en
d2 to d0, t4 to t0
a1 to a0, rl1 to rl0, st, fi,
oe, en
al, ml, s1 to s0, f2 to f0
cs, r6 to r0
f3 to f0, s1 to s0, ff, fe
dr
Note: In the following tables the POR column shows the default values of the command registers after power-on.
1. Configuration Setting Command
bit
15
1
14
0
13
0
12
b1
11
b0
10
eb
9
et
8
ex
7
x3
6
x2
5
x1
4
x0
3
i2
2
i1
1
i0
0
dc
POR
893Ah
b1
0
0
1
1
b0
0
1
0
1
Frequency Band [MHz]
315
433
868
915
x3
0
0
0
0
x2
0
0
0
0
x1
0
0
1
1
x0
0
1
0
1
Crystal Load Capacitance [pF]
8.5
9.0
9.5
10.0
i2
i1
i0
Baseband
Bandwidth [kHz]
0
0
0
0
0
1
reserved
400
1
1
1
1
1
1
0
1
15.5
16.0
0
0
1
1
1
0
0
1
0
340
270
200
Bits eb and et control the operation of the low battery detector and
wake-up timer, respectively. They are enabled when the
corresponding bit is set.
1
1
1
0
1
1
1
0
1
134
67
reserved
If ex is set the crystal is active during
When dc bit is set it disables the clock output
sleep
mode.
12
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