参数资料
型号: 5962-9957001QRA
厂商: TEXAS INSTRUMENTS INC
元件分类: ADC
英文描述: 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20
封装: CERDIP-20
文件页数: 16/47页
文件大小: 764K
代理商: 5962-9957001QRA
TLV2544, TLV2548
2.7 V TO 5.5 V, 12-BIT, 200 KSPS, 4/8 CHANNEL, LOW POWER,
SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN
SLAS198A –FEBRUARY 1999– REVISED AUGUST 1999
23
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
operating characteristics over recommended operating free-air temperature range, VCC = VREFP = 2.7 V to
5.5 V, SCLK frequency = 20 MHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Integral linearity error (INL) (see Note 4)
±1
LSB
Differential linearity error (DNL)
See Note 3
±1
LSB
EO
Offset error (see Note 5)
See Note 3
±1.5
LSB
EG
Gain error (see Note 5)
See Note 3
±1.1
±1.6
LSB
ET
Total unadjusted error (see Note 6)
±2
LSB
SDI = B000h
800h
(2048D)
Self-test output code (see Table 1 and Note 7)
SDI = C000h
000h
(0D)
SDI = D000h
FFFh
(4095D)
Internal OSC
OSC = 4 MHz to 6 MHz
2.17
2.6
3.6
s
tconv
Conversion time
External SCLK
(13XDIV)
fSCLK
tsample
Sampling time
At 1 k
600
ns
tt(I/O)
Transition time for EOC, INT
50
ns
tt(CLK)
Transition time for SDI, SDO
25
ns
All typical values are at TA = 25°C.
NOTES:
3. Analog input voltages greater than that applied to REFP convert as all ones (111111111111), while input voltages less than that
applied to REFM convert as all zeros (0000000000). The device is functional with reference down to 2 V (VREFP – VREFM);
however, the electrical specifications are no longer applicable.
4. Linear error is the maximum deviation from the best straight line through the A/D transfer characteristics.
5. Zero error is the difference between 000000000000 and the converted output for zero input voltage: full-scale error is the difference
between 111111111111 and the converted output for full-scale input voltage.
6. Total unadjusted error comprises linearity, zero, and full-scale errors.
7. Both the input data and the output codes are expressed in positive logic.
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