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参数资料
| 型号： | 5962-9960701TUX |
| 元件分类： | SRAM |
| 英文描述： | 512K X 8 STANDARD SRAM, 25 ns, CDFP36 |
| 封装： | BOTTOM BRAZED, CERAMIC, DFP-36 |
| 文件页数： | 14/15页 |
| 文件大小： | 121K |
| 代理商： | 5962-9960701TUX |
8
AC CHARACTERISTICS WRITE CYCLE (Pre/Post-Radiation)*
(-55
°C to +125°C for (C) screening and -40oC to +125oC for (E) screening) (V
DD = 3.3V + 0.3)
Notes:
* Post-radiation performance guaranteed at 25
°C per MIL-STD-883 Method 101 9.
1. Functional test performed with outputs disabled (G high).
2. Three-state is defined as 300mV change from steady-state output voltage (see Figure 3).
SYMBOL
PARAMETER
MIN
MAX
UNIT
tAVAV
1
Write cycle time
20
ns
tETWH
Device Enable to end of write
20
ns
tAVET
Address setup time for write (E - controlled)
0
ns
t
AVWL
Address setup time for write (W - controlled)
0
ns
tWLWH
Write pulse width
20
ns
tWHAX
Address hold time for write (W - controlled)
2
ns
t
EFAX
Address hold time for Device Enable (E - controlled)
2
ns
tWLQZ
2
W - controlled three-state time
10
ns
tWHQX
W - controlled Output Enable time
5
ns
tETEF
Device Enable pulse width (E - controlled)
20
ns
t
DVWH
Data setup time
15
ns
tWHDX
2
Data hold time
2
ns
t
WLEF
Device Enable controlled write pulse width
20
ns
tDVEF
2
Data setup time
15
ns
t
EFDX
Data hold time
2
ns
t
AVWH
Address valid to end of write
20
ns
t
WHWL
1
Write disable time
5
ns
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