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参数资料
| 型号： | 5962F0323601QXX |
| 元件分类： | SRAM |
| 英文描述： | 128K X 32 STANDARD SRAM, 15 ns, CQFP68 |
| 封装： | CERAMIC, QFP-68 |
| 文件页数： | 3/16页 |
| 文件大小： | 297K |
| 代理商： | 5962F0323601QXX |
11
DATA RETENTION CHARACTERISTICS (Pre and Post-Radiation)*
(VDD2 = VDD2 (min), 1 Sec DR Pulse)
SYMBOL
PARAMETER
MINIMUM
MAXIMUM
UNIT
VDR
VDD1 for data retention
1.0
V
IDDR
1
Data retention current
600
12
A
mA
tEFR
1,2
Chip deselect to data retention time
0
ns
tR
1,2
Operation recovery time
tAVAV
ns
VDD1
DATA RETENTION MODE
tR
1.7V
VDR > 1.0V
Figure 5. Low VDD Data Retention Waveform
tEFR
E1
VDD2
VIN <0.3VDD2 CMOS
E2
VSS
VIN >0.7VDD2 CMOS
1.7V
Notes:
1. 50pF including scope probe and test socket.
2. Measurement of data output occurs at the low to high or high to low transition mid-point
(i.e., CMOS input = VDD2/2).
90%
Input Pulses
10%
< 2ns
CMOS
0.0V
VDD2-0.05V
Figure 6. AC Test Loads and Input Waveforms
1.5V
188 ohms
50pF
Notes:
* Post-radiation performance guaranteed at 25
°C per MIL-STD-883 Method 1019.
1. E1 = VDD2 or E2 = VSS all other inputs = VDD2 or VSS
2. VDD2 = 0 volts to VDD2 (max)
-55oC
25oC
125oC
-40oC
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