参数资料
型号: 71M6543F-DB-CT
厂商: Maxim Integrated Products
文件页数: 56/91页
文件大小: 0K
描述: DEMO BOARD 71M6543F-DB-CT
标准包装: 1
系列: *
71M6543 Demo Board User’s Manual
Item #
10
11
12
13
14
15
16
17
18
18a
19
19a
20
21, 23, 25
22
24
26, 28, 29
27
29a
30
31
Page: 56 of 91
Reference
Designator
BT2
J21
SW5
J12
J13
SW3
TP2
J3
SW4
J25
JP6
J11, J15, J16
J9
J4, J6. J8
TP1
U5
J17, J18, J20
JP53
J22, J23, J24
J14
JP3
Name
--
DEBUG
RESET
--
--
PB
GND
IAN_IN, IAP_IN
SEGDIO53
ADC0/1
ADC8, ADC9,
ADC10
NEUTRAL
VA_IN, VB_IN,
VC_IN
TMUXOUT,
TMUX2OUT
--
--
V3P3D
ADC2/3, ADC4/5,
ADC5/6
EMULATOR I/F
ICE_E
Use
Location of optional battery for the support of RTC and
non-volatile RAM. BT2 has an alternate circular footprint at
location BT3.
Connector for the optional Debug Board. 2x8 pin male
header.
Chip reset switch: When the switch is pressed, the RESET
pin of the IC is pulled high which resets the IC into a known
state.
2-pin header. If a jumper installed, the battery BT1 will be
connected to the V3P3SYS net.
2-pin pin header. If a jumper installed, the battery BT2/BT3
will be connected to the V3P3SYS net.
Pushbutton connected to the PB pin on the IC. This push-
button can be used in conjunction with the Demo Code to
wake the IC from sleep mode or LCD mode to brown-out
mode.
GND test point.
2-pin header for the connection of the non-isolated shunt
used for neutral current measurement. This header is on
the bottom of the board.
Pushbutton for optional software function.
2-pin header that allows access to the neutral current input
pins on the 71M6543.
A jumper is placed across JP6 to activate the internal AC
power supply.
Caution: High Voltage! Do not touch!
2-pin headers that allow access to the voltage input pins on
the 71M6543.
The NEUTRAL voltage input. This input is connected to
V3P3. This input is a spade terminal mounted on the bot-
tom of the board.
Phase voltage inputs to the board. Each input has a resis-
tor divider that leads to the pin on the IC associated with
the voltage input to the ADC. These inputs have spade
terminals mounted on the bottom of the board.
Caution: High Voltage! Do not touch!
Test points for access to the TMUXOUT and TMU2XOUT
pins on the 71M6543.
The IC 71M6543 soldered to the PCB.
Two-pin headers for connection of the external shunt resis-
tors (REV 4.0) or CTs (REV 5.0) to the board.
2-pin header that connects the V3P3D pin to parts on the
board that use the V3P3D net for their power supply. For
supply current measurements in brownout mode, the
jumper on JP53 may be removed.
2-pin headers that allow access to the current input pins on
the 71M6543.
2x10 emulator connector port for the Signum ICE ADM-51
or for the Teridian TFP-2 Flash Programmer.
3-pin header for the control of the ICE_E signal. A jumper
across pins 1-2 disables the ICE interface; a jumper across
pins 2-3 enables it.
v5
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