参数资料
型号: 71M6543F-DB-CT
厂商: Maxim Integrated Products
文件页数: 89/91页
文件大小: 0K
描述: DEMO BOARD 71M6543F-DB-CT
标准包装: 1
系列: *
71M6543 Demo Board User’s Manual
Digital Pins:
Table 4-8: 71M6543 Pin Description Table 3/3
Name
COM3,COM2,
COM1,COM0
SEGDIO0 …
SEGDIO45
SEGDIO26/ COM5,
SEGDIO27/ COM4
SEGDIO36/
SPI_CSZ,
SEGDIO37/ SPI_DO,
SEGDIO38/ SPI_DI,
SEGDIO39/ SPI_CKI
SEGDIO51/
OPT_TX,
SEGDIO55/ OPT_RX
E_RXTX/SEG48
E_RST/SEG50
E_TCLK/SEG49
ICE_E
TMUXOUT/ SEG47,
TMUX2OUT/ SEG46
RESET
RX
TX
TEST
PB
NC
Type
O
I/O
I/O
I/O
I/O
I/O
O
I
O
I
I
O
I
I
N/C
Description
LCD Common Outputs: These 4 pins provide the select signals for
the LCD display.
Multi-use pins, configurable as either LCD segment driver or DIO.
Alternative functions with proper selection of associated I/O RAM
registers are:
SEGDIO0 = WPULSE
SEGDIO1 = VPULSE
SEGDIO2 = SDCK
SEGDIO3 = SDATA
SEGDIO6 = XPULSE
SEGDIO7 = YPULSE
Unused pins must be configured as outputs or terminated to
V3P3/GNDD.
Multi-use pins, configurable as either LCD segment driver or DIO with
alternative function (LCD common drivers).
Multi-use pins, configurable as either LCD segment driver or DIO with
alternative function (SPI interface).
Multi-use pins, configurable as either LCD segment driver or DIO with
alternative function (optical port/UART1)
Multi-use pins, configurable as either emulator port pins (when ICE_E
pulled high) or LCD segment drivers (when ICE_E tied to GND).
ICE enable. When zero, E_RST, E_TCLK, and E_RXTX become
SEG50, SEG49, and SEG48 respectively. For production units, this
pin should be pulled to GND to disable the emulator port.
Multi-use pins, configurable as either multiplexer/clock output or LCD
segment driver using the I/O RAM registers .
Chip reset: This input pin is used to reset the chip into a known state.
For normal operation, this pin is pulled low. To reset the chip, this pin
should be pulled high. This pin has an internal 30 μA (nominal) cu r-
rent source pull-down. No external reset circuitry is necessary.
UART0 input. If this pin is unused it must be terminated to
V3P3D or GNDD.
UART0 output.
Enables Production Test.
This pin must be grounded in normal operation.
Push button input. This pin must be at GNDD when not active or un-
used. A rising edge sets the IE_PB flag. It also causes the part to wake
up if it is in SLP or LCD mode. PB does not have an internal pull-up or
pull-down resistor.
Do not connect this pin.
Pin types: P = Power, O = Output, I = Input, I/O = Input/Output,
Page: 89 of 91
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