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| 型号： | 73S1215F-EB |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 107/136页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL 73S1215F CBL/DOC/CD |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 系列： | * |
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73S1215F Data Sheet
DS_1215F_003
1.7.13 Emulator Port
The emulator port, consisting of the pins E_RST, E_TCLK and E_RXTX, provides control of the MPU
through an external in-circuit emulator. The E_TBUS[3:0] pins, together with the E_ISYNC/BRKRQ, add
trace capability to the emulator. The emulator port is compatible with the ADM51 emulators
manufactured by Signum Systems.
The emulator port, consisting of the pins E_RST, E_TCLK and E_RXTX, provides control of the MPU
through an external in-circuit emulator. The E_TBUS[3:0] pins, together with the E_ISYNC/BRKRQ, add
trace capability to the emulator. The emulator port is compatible with the ADM51 emulators
manufactured by Signum Systems.
If code trace capability is needed on this interface, 20pF capacitors (to ground) need to be added to allow
the trace function capability to run properly. These capacitors should be attached to the TBUS0:3 and
ISBR signals.
If code trace capability is needed on this interface, 20pF capacitors (to ground) need to be added to allow
the trace function capability to run properly. These capacitors should be attached to the TBUS0:3 and
ISBR signals.
1.7.14 USB Interface
The 73S1215F provides a single interface, full speed -12Mbps - USB device port as per the Universal
Serial Bus Specification, Revision 2.0
(backward compatible with USB 1.1). USB circuitry gathers the
transceiver, the Serial Interface Engine (SIE), and the data buffers. An internal pull-up to VDD on D+
indicates that the device is a full speed device attached to the USB bus (allows full speed recognition by
the host without adding any external components). When using the USB interface, VDD must be between
3.0V – 3.6V in order to meet the USB VOH requirement. The interface is highly configurable under
firmware control. Control (Endpoint 0), Interrupt IN, Bulk IN and Bulk OUT transfers are supported. Four
endpoints are supported and are configured by firmware:
The 73S1215F provides a single interface, full speed -12Mbps - USB device port as per the Universal
Serial Bus Specification, Revision 2.0
(backward compatible with USB 1.1). USB circuitry gathers the
transceiver, the Serial Interface Engine (SIE), and the data buffers. An internal pull-up to VDD on D+
indicates that the device is a full speed device attached to the USB bus (allows full speed recognition by
the host without adding any external components). When using the USB interface, VDD must be between
3.0V – 3.6V in order to meet the USB VOH requirement. The interface is highly configurable under
firmware control. Control (Endpoint 0), Interrupt IN, Bulk IN and Bulk OUT transfers are supported. Four
endpoints are supported and are configured by firmware:
Endpoint 0, the default (Control) endpoint as required by the Universal Serial Bus Specification, is
used to exchange control and status information between the 73S1215F and the USB host.
Endpoint 0, the default (Control) endpoint as required by the Universal Serial Bus Specification, is
used to exchange control and status information between the 73S1215F and the USB host.
Bulk IN Endpoint #1
Bulk IN Endpoint #1
Bulk OUT Endpoint #1
Bulk OUT Endpoint #1
Interrupt IN Endpoint #2
Interrupt IN Endpoint #2
The USB block contains several FIFOs used for communication.
The USB block contains several FIFOs used for communication.
There is a 128 byte RAM FIFO for each BULK endpoint. Maximum Bulk packet size is 64 bytes.
There is a 128 byte RAM FIFO for each BULK endpoint. Maximum Bulk packet size is 64 bytes.
There is a 32 byte RAM FIFO for the interrupt endpoint. Maximum Interrupt packet size is 16 bytes.
There is a 32 byte RAM FIFO for the interrupt endpoint. Maximum Interrupt packet size is 16 bytes.
There is a 16 byte RAM FIFO for the control endpoint. Maximum Control packet size is 16 bytes.
There is a 16 byte RAM FIFO for the control endpoint. Maximum Control packet size is 16 bytes.
Figure 14 shows the simplified block diagram of the USB interface.
Transceivers
VDD
0
MISCtl1
D+
D-
USB Registers
16-Byte FIFO
Control Endpoint 0
128-Byte FIFO
Bulk IN Endpoint 1
128-Byte FIFO
Bulk OUT Endpoint 1
32-Byte FIFO
Interrupt IN Endpoint 2
48MHz
Clock
USB
Full Speed
12Mbps
Serial
Interface
Engine
1
MISCtl1
USBPEN
USBCon
72
Rev. 1.4
Figure 14: USB Block Diagram
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相关代理商/技术参数 |
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| 73S1215F-EB-Lite | 功能描述:开发板和工具包 - 8051 73S1215F Eval Brd Lite (USD Cbl, D.Cd) RoHS:否 制造商:Silicon Labs 产品:Development Kits 工具用于评估:C8051F960, Si7005 核心: 接口类型:USB 工作电源电压: |
| 73S1217F | 制造商:TERIDIAN 制造商全称:TERIDIAN 功能描述:Bus-Powered 80515 System-on-Chip with USB, ISO 7816 / EMV, PINpad and More |
| 73S1217F-68IM/F | 功能描述:8位微控制器 -MCU Bus Pwr’d 80515 SoC w/USB 7816/EMV PINpd RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| 73S1217F-68IM/F/P | 功能描述:IC SMART CARD READER PROG 68-QFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:73S12xx 产品培训模块:MCU Product Line Introduction AVR® UC3 Introduction 标准包装:2,500 系列:AVR®32 UC3 B 核心处理器:AVR 芯体尺寸:32-位 速度:60MHz 连通性:I²C，IrDA，SPI，SSC，UART/USART，USB 外围设备:欠压检测/复位，DMA，POR，PWM，WDT 输入/输出数:28 程序存储器容量:128KB（128K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:32K x 8 电压 - 电源 (Vcc/Vdd):1.65 V ~ 1.95 V 数据转换器:A/D 6x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:48-TQFP 包装:带卷 (TR) 配用:ATSTK600-TQFP48-ND - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1101-ND - KIT DEV/EVAL FOR AVR32 AT32UC3B 其它名称:AT32UC3B1128-AUR-NDAT32UC3B1128-AURTR |
| 73S1217F-68IMR/F | 功能描述:8位微控制器 -MCU Bus Pwr’d 80515 SoC w/USB 7816/EMV PINpd RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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