参数资料
型号: 74HC4046AD/T3
厂商: NXP SEMICONDUCTORS
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, PDSO16
封装: SOT-109, SOP-16
文件页数: 10/34页
文件大小: 442K
代理商: 74HC4046AD/T3
1997 Nov 25
18
Philips Semiconductors
Product specication
Phase-locked-loop with VCO
74HC/HCT4046A
VCO section
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
tPHZ/
tPLZ
3-state output disable
time SIGIN, COMPIN
to PC2OUT
36
65
81
98
ns
4.5
Fig.17
tTHL/
tTLH
output transition time
7
15
19
22
ns
4.5
Fig.16
VI (p-p)
AC coupled input
sensitivity
(peak-to-peak value)
at
SIGIN or COMPIN
15
mV
4.5
fi = 1 MHz
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HCT
VCC
(V)
OTHER
+25
40 to +85 40 to +125
min.
typ.
max
min.
max
min.
max.
f/T
frequency stability
with temperature
change
0.15
%/K
4.5
VI =VVCOIN withi
n recommended
range;
R1 = 100 k
;
R2 =
∞;
C1 = 100 pF;
see Fig.18b
fo
VCO centre frequency
(duty factor = 50%)
11.0
17.0
MHz
4.5
VVCOIN = 1/2 VCC
;
R1 = 3 k
;
R2 =
∞;
C1 = 40 pF;
see Fig.19
fVCO
VCO frequency
linearity
0.4
%
4.5
R1 = 100 k
;
R2 =
∞;
C1 = 100 pF;
see Figs 20
and 21
δVCO
duty factor at VCOOUT
50
%
4.5
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HCT
VCC
(V)
OTHER
+25
40 to +85 40 to +125
min.
typ.
max.
min.
max.
min.
max.
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