参数资料
型号: 78P2351R-DB
厂商: Maxim Integrated Products
文件页数: 4/15页
文件大小: 0K
描述: BOARD DEMO FOR 78P2351R
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: *

Design Guidelines for TERIDIAN 78P235x LIUs
All CMI coded (Analog) differential pair signal routes should have a differential trace impedance of 75 ? between
the 78P235x IC and the transformer. The termination resistors need to be placed as close as possible, and within
one inch, of their 78P235x pins to optimize transmit pulse shaping and minimize reflections.
The transmit and receive ‘Tip’ (on primary side of transformer) should be a 75 ? single-ended trace to the coax
connector. The coax shield or ‘Ring’ should be directly connected to the frame or chassis ground plane. The
quality of this ground connection is critical for ESD Immunity at the faceplate and EMC performance.
Unlike the CMI Receiver, the Transmitter requires external biasing. Figure 5 shows two methods for biasing the
transmit driver. Biasing the transmit path at the transformer center tap with a single 75 ? termination resistor uses
the fewest components, but is only recommended when the transformer placement can be near the LIU.
The alternate (and preferred) method is to bias the transmit path between the 2 termination resistors minimizing
the path and inductance from Vcc to the internal current sink. The value of each resistor should equal to one half
of the total termination used for the pair, so that each half of the signal is seeing the correct termination value
(37.5 ? ). The decoupling capacitor value should be 0.1uF (or a combination of 0.01uF and 0.1uF).
RX CMI Input
< 1"
RXxP
to gates
TIP
RING
75 ohm
37.5 ohm
75
10k
37.5 ohm
10k
2.1V
to gates
RXxN
PCB
Figure 4: CMI Receiver
VCC
235x IC
75 ohm
37.5 ohm
< 1"
CMIxP
TIP
75
RING
0.1uF
37.5 ohm
CMIxN
from
circuit
TX CMI Output
(Transformer Bias)
VCC
0.1uF
PCB
26mA
235x IC
TIP
RING
75 ohm
37.5 ohm 37.5
37.5 CMIxP
37.5 ohm
CMIxN
from
circuit
< 1"
TX CMI Output
(Resistor Bias)
PCB
26mA
235x IC
Figure 5: CMI Transmitter (Transformer and Resistor Biasing options)
Page 4 of 15
? 2008 Teridian Semiconductor Corp.
Rev 2.1
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