参数资料
型号: 843002AKI-40LF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: XO, clock
英文描述: 175 MHz, OTHER CLOCK GENERATOR, QCC32
封装: 3 X 3 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD, VFQFN-32
文件页数: 21/24页
文件大小: 742K
代理商: 843002AKI-40LF
ICS843002I-40
175MHZ, FEMTOCLOCKS VCXO BASED SONET/SDH JITTER ATTENUATOR
IDT / ICS VCXO BASED SONET/SDH JITTER ATTENUATOR
6
ICS843002AKI-40 REV. B APRIL 27, 2009
Table 4B. LVCMOS/LVTTL DC Characteristics, VCC = 3.3V±5%, VCCO_LVCMOS = 3.3V±5% or 2.5V±5%, VEE = 0V,
TA = -40°C to 85°C
Table 4C. Differential DC Characteristics, VCC = 3.3V±5%, VCCO_LVPECL = 3.3V±5% or 2.5V±5%, VEE = 0V,
TA = -40°C to 85°C
NOTE 1: VIL cannot be less than -0.3V
NOTE 2: Common mode input voltage is defined as VIH.
Table 4D. LVPECL DC Characteristics, VCC = VCCO_LVPECL = 3.3V±5%, VEE = 0V, TA = -40°C to 85°C
NOTE 1: Outputs terminated with 50
to V
CCO_LVPECL – 2V.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VIH
Input High Voltage
2
VCC + 0.3
V
VIL
Input Low Voltage
-0.3
0.8
V
IIH
Input High Current
QA_SEL[0:1],
QB_SEL[0:1]
VCC = VIN = 3.465V
5
A
CLK_SEL,
R_SEL[0:2]
VCC = VIN = 3.465V
150
A
IIL
Input Low Current
QA_SEL[0:1],
QB_SEL[0:1]
VCC = 3.465V, VIN = 0V
-150
A
CLK_SEL,
R_SEL[0:2]
VCC = 3.465V, VIN = 0V
-5
A
VOH
Output High Voltage
LOR0, LOR1
VCCO_LVCMOS = 3.465V,
IOH = 1mA
2.6
V
VCCO_LVCMOS = 2.625V,
IOH = 1mA
1.8
V
VOL
Output Low Voltage
LOR0, LOR1
VCCO_LVCMOS = 3.465V or
2.625V, IOL= -1mA
0.5
V
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
IIH
Input High Current
CLK0/nCLK0,
CLK1/nCLK1
VCC = VIN = 3.465V
150
A
IIL
Input Low Current
CLK0, CLK1
VCC = 3.465V, VIN = 0V
-5
A
nCLK0, nCLK1
VCC = 3.465V, VIN = 0V
-150
A
VPP
Peak-to-Peak Voltage; NOTE 1
0.15
1.3
V
VCMR
Common Mode Input Voltage; NOTE 1, 2
VEE + 0.5
VCC – 0.85
V
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VOH
Output High Voltage; NOTE 1
VCCO – 1.4
VCCO – 0.9
V
VOL
Output Low Voltage; NOTE 1
VCCO – 2.0
VCCO – 1.7
V
VSWING
Peak-to-Peak Output Voltage Swing
0.6
1.0
V
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