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| 型号： | 89HPES12T3G2 |
| 厂商： | Integrated Device Technology, Inc. |
| 英文描述： | 12-Lane 3-Port Gen2 PCI Express Switch |
| 中文描述： | 12巷3端口第二代的PCI Express开关 |
| 文件页数： | 7/31页 |
| 文件大小： | 291K |
| 代理商： | 89HPES12T3G2 |
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September 4, 2007
IDT 89HPES12T3G2 Data Sheet
A
JTAG_TDO
O
JTAG Data Output
. This is the serial data shifted out fromthe boundary
scan logic or JTAG Controller. When no data is being shifted out, this signal
is tri-stated.
JTAG_TMS
I
JTAG Mode
. The value on this signal controls the test mode select of the
boundary scan logic or JTAG Controller.
JTAG_TRST_N
I
JTAG Reset
. This active low signal asynchronously resets the boundary
scan logic and JTAG TAP Controller. An external pull-up on the board is
recommended to meet the JTAG specification in cases where the tester
can access this signal. However, for systems running in functional mode,
one of the following should occur:
1) actively drive this signal low with control logic
2) statically drive this signal low with an external pull-down on the board
S ignal
Type
Name/Desc ription
REFRES0
I/O
Port 0 External Reference Resistor.
Provides a reference for the Port 0
SerDes bias currents and PLL calibration circuitry. A 3 kOhm+/- 1% resis-
tor should be connected fromthis pin to ground.
REFRES2
I/O
Port 2 External Reference Resistor.
Provides a reference for the Port 2
SerDes bias currents and PLL calibration circuitry. A 3 kOhm+/- 1% resis-
tor should be connected fromthis pin to ground.
REFRES4
I/O
Port 4 External Reference Resistor.
Provides a reference for the Port 4
SerDes bias currents and PLL calibration circuitry. A 3 kOhm+/- 1% resis-
tor should be connected fromthis pin to ground.
V
DD
CORE
I
Core V
DD.
Power supply for core logic.
V
DD
I/O
I
I/O V
DD.
LVTTL I/O buffer power supply.
V
DD
PEA
I
PCI Express Analog Power.
Serdes analog power supply (1.0V).
V
DD
PEHA
I
PCI Express Analog High Power.
Serdes analog power supply (2.5V).
V
DD
PETA
I
PCI Express Transmitter Analog Voltage.
Serdes transmtter analog
power supply (1.0V).
V
SS
I
Ground.
Table 7 Power, Ground, and SerDes Resistor Pins
S ignal
Type
Name/Desc ription
Table 6 Test Pins (Part 2 of 2)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 89HPES12T3G2ZABC | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:12-Lane 3-Port Gen2 PCI Express Switch |
| 89HPES12T3G2ZABC8 | 功能描述:开关 IC - 各种 RoHS:否 制造商:Fairchild Semiconductor 开启电阻（最大值）: 电源电压-最大:4.4 V 电源电压-最小:2.5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:WLCSP-9 封装:Reel |
| 89HPES12T3G2ZABCG | 功能描述:接口-I/O扩展器 RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
| 89HPES12T3G2ZABCG8 | 功能描述:开关 IC - 各种 RoHS:否 制造商:Fairchild Semiconductor 开启电阻（最大值）: 电源电压-最大:4.4 V 电源电压-最小:2.5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:WLCSP-9 封装:Reel |
| 89HPES12T3G2ZBBC | 功能描述:Switch Interfacing Interface 324-CABGA (19x19) 制造商:idt, integrated device technology inc 系列:PRECISE?? 包装:托盘 零件状态:有效 应用:开关接口 接口:PCI Express 电压 - 电源:3.3V 封装/外壳:324-LBGA 供应商器件封装:324-CABGA（19x19） 安装类型:表面贴装 标准包装:84 |
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