参数资料
| 型号： | 93LC46/P |
| 厂商： | Microchip Technology |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 1KBIT 1MHZ 8DIP |
| 标准包装： | 60 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 1K（128 x 8 或 64 x 16） |
| 速度： | 1MHz |
| 接口： | Microwire 3 线串行 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 1450 (CN2011-ZH PDF) |
93LC46/56/66
2.7
Write
The DO pin indicates the Ready/Busy status of the
The WRITE instruction is followed by 16 bits (or by 8
bits) of data which are written into the specified
address. After the last data bit is put on the DI pin,
device if CS is brought high after a minimum of 250 ns
low (T CSL ) and before the entire write cycle is complete.
The ERAL cycle takes (8 ms typical).
CS must be brought low before the next rising edge
of the CLK clock. This falling edge of CS initiates the
2.9
Write All ( WRAL )
self-timed auto-erase and programming cycle.
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (T CSL ) and before the entire write cycle is complete.
DO at logical “ 0 ” indicates that programming is still in
progress. DO at logical “ 1 ” indicates that the register at
the specified address has been written with the data
specified and the device is ready for another
instruction.
The write cycle takes 4 ms per word typical.
The WRAL instruction will write the entire memory array
with the data specified in the command. The WRAL
cycle is completely self-timed and commences at the
falling edge of the CS. Clocking of the CLK pin is not
necessary after the device has entered the self clock-
ing mode. The WRAL command does include an auto-
matic ERAL cycle for the device. Therefore, the WRAL
instruction does not require an ERAL instruction but the
chip must be in the EWEN status. The WRAL instruction
is ensured at 5V ±10%.
The DO pin indicates the Ready/Busy status of the
2.8
Erase All ( ERAL )
device if CS is brought high after a minimum of 250 ns
The ERAL instruction will erase the entire memory array
to the logical “ 1 ” state. The ERAL cycle is identical to
the ERASE cycle except for the different opcode. The
ERAL cycle is completely self-timed and commences
at the falling edge of the CS. Clocking of the CLK pin is
not necessary after the device has entered the self
clocking mode. The ERAL instruction is ensured at 5V
±10%.
low (Tcsl).
The WRAL cycle takes 16 ms typical.
FIGURE 2-1:
CS
CLK
READ TIMING
DI
1
1
0
An
? ? ?
A0
DO
High-Z
0
Dx
???
D0
Dx
???
D0
Dx
???
D0
? 2004 Microchip Technology Inc.
DS21712B-page 7
相关PDF资料 |
PDF描述 |
|---|---|
| 93LC86C-I/MS | IC EEPROM 16KBIT 3MHZ 8MSOP |
| 93AA86C-I/MS | IC EEPROM 16KBIT 3MHZ 8MSOP |
| 93AA46/SN | IC EEPROM 1KBIT 2MHZ 8SOIC |
| 25LC040A-I/ST | IC EEPROM 4KBIT 10MHZ 8TSSOP |
| 93AA86C-I/ST | IC EEPROM 16KBIT 3MHZ 8TSSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 93LC46-SL | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 2.0V Microwire Serial EEPROM |
| 93LC46-SM | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 2.0V Microwire Serial EEPROM |
| 93LC46SN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 2.5V Microwire Serial EEPROM |
| 93LC46-SN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 2.0V Microwire Serial EEPROM |
| 93LC46T | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 2.5V Microwire Serial EEPROM |
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