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参数资料
| 型号： | 9LPRS365BKLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC64 |
| 封装： | PLASTIC, VQFN-64 |
| 文件页数： | 4/28页 |
| 文件大小： | 301K |
| 代理商： | 9LPRS365BKLF |
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12
ICS9LPRS365
Datasheet
1218—09/01/10
Absolute Maximum Ratings
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Notes
Maximum Supply Voltage
VDDxxx
Core/Logic Supply
4.6
V
1,2
Maximum Supply Voltage
VDDxxx_IO
Low Voltage Differential I/O Supply
3.8
V
1,2
Maximum Input Voltage
V
IH
3.3V LVCMOS Inputs
4.6
V
1,2,3
Minimum Input Voltage
V
IL
Any Input
GND - 0.5
V
1,2
Storage Temperature
Ts
-
-65
150
°C1,2
Case Temperature
Tcase
-
115
°C
1,2
Input ESD protection
ESD prot
Human Body Model
2000
V
1,2
1Guaranteed by design and characterization, not 100% tested in production.
2 Operation under these conditions is neither implied, nor guaranteed.
3 Maximum input voltage is not to exceed maximum VDD
Electrical Characteristics - Input/Supply/Common Output Parameters
PARAMETER
SYMBOL
CONDITIONS
MIN
TYPICAL
MAX
UNITS
Notes
Ambient Operating Temp
Tambient
-
0
70
°C
1
Supply Voltage
VDDxxx
Supply Voltage
3.135
3.465
V
1
Supply Voltage
VDDxxx_IO
Low-Voltage Differential I/O Supply
1
3.465
V
1
Input High Voltage
V
IHSE
Single-ended inputs
2
V
DD + 0.3
V
1
Input Low Voltage
V
ILSE
Single-ended inputs
V
SS - 0.3
0.8
V
1
Input Leakage Current
I
IN
V
IN = VDD , VIN = GND
-5
5
uA
1
Input Leakage Current
I
INRES
Inputs with pull or pull down resistors
V
IN = VDD , VIN = GND
-200
200
uA
1
Output High Voltage
V
OHSE
Single-ended outputs, I
OH = -1mA
2.4
V
1
Output Low Voltage
V
OLSE
Single-ended outputs, I
OL = 1 mA
0.4
V
1
Output High Voltage
V
OHDIF
Differential Outputs, I
OH = TBD mA
0.7
0.9
V
1
Output Low Voltage
V
OLDIF
Differential Outputs, I
OL = TBD mA
0.4
V
1
Low Threshold Input-
High Voltage (Test Mode)
V
IH_FS_TEST
3.3 V +/-5%
2
V
DD + 0.3
V
1
Low Threshold Input-
High Voltage
V
IH_FS
3.3 V +/-5%
0.7
1.5
V
1
Low Threshold Input-
Low Voltage
V
IL_FS
3.3 V +/-5%
V
SS - 0.3
0.35
V
1
I
DD_DEFAULT
3.3V supply, PLL3 off
95
250
mA
1
I
DD_PLL3DIF
3.3V supply, PLL3 Differential Out
106
250
mA
1
I
DD_PLL3SE
3.3V supply, PLL3 Single-ended Out
101
250
mA
1
I
DD_IO
0.8V supply, Differential IO current,
all outputs enabled
25
32
80
mA
1
I
DD_PD3.3
3.3V supply, Power Down Mode
26
30
mA
1
I
DD_PDIO
0.8V IO supply, Power Down Mode
0.23
0.5
mA
1
I
DD_iAMT3.3
3.3V supply, iAMT Mode
47
80
mA
1
I
DD_iAMT0.8
0.8V IO supply, iAMTMode
5
10
mA
1
Input Frequency
F
i
V
DD = 3.3 V
14.318
MHz
1
Pin Inductance
L
pin
7nH
1
C
IN
Logic Inputs
1.5
5
pF
1
C
OUT
Output pin capacitance
6
pF
1
C
INX
X1 & X2 pins
5
pF
1
Spread Spectrum Modulation
Frequency
f
SSMOD
Triangular Modulation
30
33
kHz
1
*T
A = 0 - 70°C; VDD = 3.3 V +/-5%
Operating Supply Current
Power Down Current
iAMT Mode Current
Input Capacitance
1Guaranteed by design and characterization, not 100% tested in production.
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