参数资料
型号: A1280A-1CQG172M
元件分类: FPGA
英文描述: FPGA, 1232 CLBS, 8000 GATES, 60 MHz, CQFP172
封装: CERAMIC, CQFP-172
文件页数: 49/54页
文件大小: 333K
代理商: A1280A-1CQG172M
RadTolerant FPGAs
v3.1
3-1
Datasheet Information
List of Changes
The following table lists critical changes that were made in the current version of the document.
Datasheet Categories
In order to provide the latest information to designers, some datasheets are published before data has been fully
characterized. Datasheets are designated as "Product Brief," "Advanced," "Production," and "Datasheet
Supplement." The definitions of these categories are as follows:
Product Brief
The product brief is a summarized version of a datasheet (advanced or production) containing general product
information. This brief gives an overview of specific device and family information.
Advanced
This datasheet version contains initial estimated information based on simulation, other products, devices, or speed
grades. This information can be used as estimates, but not for production.
Unmarked (production)
This datasheet version contains information that is considered to be final.
Datasheet Supplement
The datasheet supplement gives specific device information for a derivative family that differs from the general family
datasheet. The supplement is to be used in conjunction with the datasheet to obtain more detailed information and
for specifications that do not differ between the two families.
Export Administration Regulations (EAR) or International Traffic in
Arms Regulations (ITAR)
The product described in this datasheet could be subject to either the Export Administration Regulations (EAR) or in
some cases the International Traffic in Arms Regulations (ITAR). They could require an approved export license prior to
export from the United States. An export includes release of product or disclosure of technology to a foreign national
inside or outside the United States.
Previous Version Changes in Current Version (v 3 .1 )
Page
v3.0
The following pins changed in the "84-Pin CQFP" table:
Pin 61 change to SDI, Input for the RT1020 device.
Pin 62 change to DCLK, Input for the RT1020 device.
The following pins changed in the "256-Pin CQFP" table:
Pin 124 change to I/O for the A14100A and RT14100A devices.
Pin 127 changed to IOPCL for the A14100A and RT14100A devices.
相关PDF资料
PDF描述
A1280A-CQG172B FPGA, 1232 CLBS, 8000 GATES, 41 MHz, CQFP172
A1280A-CQG172M FPGA, 1232 CLBS, 8000 GATES, 41 MHz, CQFP172
A1020B-CQ84C FPGA, 547 CLBS, 2000 GATES, 37 MHz, CQFP84
A14100A-1CQ256B FPGA, 1377 CLBS, 30000 GATES, 100 MHz, CQFP256
A1280A-1CQ172E FPGA, 1232 CLBS, 8000 GATES, 60 MHz, CQFP172
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