参数资料
型号: A4447SLJTR-T
厂商: Allegro Microsystems Inc
文件页数: 11/12页
文件大小: 0K
描述: IC REG BUCK ADJ 2A 8SOIC
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 24 V
输入电压: 8 V ~ 50 V
PWM 型: 电流模式
电流 - 输出: 2A
同步整流器:
工作温度: -20°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm Width)裸露焊盘
包装: 标准包装
供应商设备封装: 8-SOIC-EP
产品目录页面: 1141 (CN2011-ZH PDF)
其它名称: 620-1329-6
A4447
High Voltage Step Down Regulator
Package LJ, 8 Pin SOIC
8
4.90 ±0.10
0.65
8
1.27
0.25
0.17
1.75
2.41 NOM
A
B
3.90 ±0.10
6.00 ±0.20
1.04 REF
2.41
5.60
1
2
3.30 NOM
1.27
0.40
1
2
3.30
C
PCB Layout Reference View
8X
0.10 C
0.51
0.31
1.27 BSC
Branded Face
SEATING
PLANE
1.70 MAX
0.15
0.00
C
0.25 BSC
SEATING PLANE
GAUGE PLANE
For Reference Only; not for tooling use (reference MS-012BA)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B
C
Exposed thermal pad (bottom surface); dimensions may vary with device
Reference land pattern layout (reference IPC7351
SOIC127P600X175-9AM); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances; when mounting on a multilayer
PCB, thermal vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
Termina l List Table
Pin Out Diagram
BOOT 1 8 VIN
ENB 2 7 LX
Pad
TSET 3 6 VBIAS
GND 4 5 FB
Number
1
2
3
4
5
6
7
8
Name
BOOT
ENB
TSET
GND
FB
VBIAS
LX
VIN
Description
Gate drive boost node
On/off control; logic input
Off-time setting
Ground
Feedback for adjustable regulator
Bias supply input
Buck switching node
Supply input
Allegro MicroSystems, LLC
115 Northeast Cutoff
11
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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