参数资料
| 型号： | A4447SLJTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 7/12页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 24 V |
| 输入电压： | 8 V ~ 50 V |
| PWM 型： | 电流模式 |
| 电流 - 输出： | 2A |
| 同步整流器： | 无 |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOIC-EP |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1329-6 |
A4447
RTSET Selection. Correct selection of RTSET values will
ensure that minimum on time of the switcher is not violated
High Voltage Step Down Regulator
ditions, refer to the RTSET Value Selection graph.
and prevent the switcher from cycle skipping. For a given V IN
to V OUT ratio, R TSET must be greater than or equal to the value
defined by the curve in the RTEST Value Selection graph below.
Note. The curve represents the minimum RTSET value. When
calculating R TSET , be sure to use V IN (max) / V OUT (min). Resistor
tolerance should also be considered, so that under all operating
conditions the resistance on the TSET pin remains as close to the
curve as possible.
The RTEST Selection table shows recommended R TSET values
based on common operating conditions. For other operating con-
RTSET Value Selection*
Selection Graph
CBYP Selection. In certain applications, C BYP can be used
to improve closed loop response of the converter. Typically, a
0.22 uF capacitor ensures better loop response for wide range of
applications. Resistor R3 prevents negative voltage on the FB pin
due to C BYP capacitor during sudden changes in V OUT .
FB Resistor Selection. The impedance of the FB network
should be kept low to improve noise immunity. Large value resis-
tors can pick up noise generated by the inductor, which can affect
voltage regulation of the switcher.
Recommended Common Values
70
65
V IN
(V)
V OUT
(V)
V IN / V OUT
R TSET Value
(k Ω )
60
55
50
45
40
35
30
25
20
15
10
5
0
Violation of
Minimum On-Time
Safe Operating Area
42
42
42
42
24
24
24
24
12
12
5
3.3
1.8
1.5
5
3.3
1.8
1.5
5
3.3
8.4
12.7
23.3
28
4.8
7.3
13.3
16
2.4
3.6
37.4
54.9
90.9
105
20.0
32.4
54.9
66.5
7.68
13.7
0
15
30
45
60
75
90 105 120
R TSET (k Ω )
135
150
165
180
195
210
12
12
1.8
1.5
6.6
8
30.1
37.4
*The R TSET resistor should be not smaller than 7.65 k Ω ±2% to prevent very short off-times from violating the minimum on-time of
the switcher.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
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