参数资料
| 型号： | A54SX08A-2TQ144I |
| 厂商： | Microsemi SoC |
| 文件页数： | 35/108页 |
| 文件大小： | 0K |
| 描述： | IC FPGA SX 12K GATES 144-TQFP |
| 标准包装： | 60 |
| 系列： | SX-A |
| LAB/CLB数： | 768 |
| 输入/输出数： | 113 |
| 门数： | 12000 |
| 电源电压： | 2.25 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 144-LQFP |
| 供应商设备封装： | 144-TQFP（20x20） |
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SX-A Family FPGAs
2- 12
v5.3
Theta-JA
Junction-to-ambient thermal resistance (θJA) is determined under standard conditions specified by JESD-51 series but
has little relevance in actual performance of the product in real application. It should be employed with caution but is
useful for comparing the thermal performance of one package to another.
A sample calculation to estimate the absolute maximum power dissipation allowed (worst case) for a 329-pin PBGA
package at still air is as follows. i.e.:
EQ 2-11
The device's power consumption must be lower than the calculated maximum power dissipation by the package.
The power consumption of a device can be calculated using the Actel power calculator. If the power consumption is
higher than the device's maximum allowable power dissipation, then a heat sink can be attached on top of the case or
the airflow inside the system must be increased.
Theta-JC
Junction-to-case thermal resistance (θJC) measures the ability of a device to dissipate heat from the surface of the chip
to the top or bottom surface of the package. It is applicable for packages used with external heat sinks and only
applies to situations where all or nearly all of the heat is dissipated through the surface in consideration. If the power
consumption is higher than the calculated maximum power dissipation of the package, then a heat sink is required.
Calculation for Heat Sink
For example, in a design implemented in a FG484 package, the power consumption value using the power calculator is
3.00 W. The user-dependent data TJ and TA are given as follows:
From the datasheet:
EQ 2-12
The 2.22 W power is less than then required 3.00 W; therefore, the design requires a heat sink or the airflow where the
device is mounted should be increased. The design's junction-to-air thermal resistance requirement can be estimated
by:
EQ 2-13
θ
JA
= 17.1°C/W is taken from Table 2-12 on page 2-11
TA
= 125°C is the maximum limit of ambient (from the datasheet)
Max. Allowed Power
Max Junction Temp
Max. Ambient Temp
–
θ
JA
------------------------------------------------------------------------------------------------------------
150
°C 125°C
–
17.1
°C/W
----------------------------------------
1.46 W
==
=
TJ = 110°C
TA = 70°C
θ
JA = 18.0°C/W
θ
JC = 3.2 °C/W
P
Max Junction Temp
Max. Ambient Temp
–
θ
JA
------------------------------------------------------------------------------------------------------------
110
°C70°C
–
18.0
°C/W
------------------------------------
2.22 W
==
=
θ
JA
Max Junction Temp
Max. Ambient Temp
–
P
------------------------------------------------------------------------------------------------------------
110
°C70°C
–
3.00 W
------------------------------------
13.33
°C/W
==
=
相关PDF资料 |
PDF描述 |
|---|---|
| A54SX08A-2TQG144I | IC FPGA SX 12K GATES 144-TQFP |
| A3P250-1FGG144T | IC FPGA 1KB FLASH 250K 144-FBGA |
| A3P250-1FG144T | IC FPGA 1KB FLASH 250K 144-FBGA |
| EP4CE40F23C9LN | IC CYCLONE IV FPGA 40K 484FBGA |
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| A54SX08A-2TQ208I | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SX-A Family FPGAs |
| A54SX08A-2TQ208M | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SX-A Family FPGAs |
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