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参数资料
| 型号： | A8290SETTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 10/20页 |
| 文件大小： | 0K |
| 描述： | IC VOLTAGE REG SGL LNB 28-QFN |
| 标准包装： | 9,000 |
| 应用： | 转换器，模拟和数字式卫星信号接收器 |
| 输入电压： | 8 V ~ 16 V |
| 输出数： | 1 |
| 输出电压： | 12.7 V ~ 20.4 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-VFQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN/MLP 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
A8290
Single LNB Supply and Control Voltage Regulator
The Read/Write bit is used to determine the data transfer direc-
tion. If the Read/Write bit is high, the master reads the contents of
register 1, followed by register 2 if a further read is performed. If
the Read/Write bit is low, the master writes data to one of the two
Control registers. Note that multiple writes are not permitted. All
write operations must be preceded with the address.
The Acknowledge bit has two functions. It is used by the mas-
ter to determine if the slave device is responding to its address
and data, and it is used by the slave when the master is reading
data back from the slave. When the A8290 decodes the 7-bit ad-
dress field as a valid address, it responds by pulling SDA low
during the ninth clock cycle.
During a data write from the master, the A8290 also pulls SDA
low during the clock cycle that follows the data byte, in order to
indicate that the data has been successfully received. In both cas-
es, the master device must release the SDA line before the ninth
clock cycle, in order to allow this handshaking to occur.
During a data read, the A8290 acknowledges the address in the
same way as in the data write sequence, and then retains control
of the SDA line and send the data from register 1 to the master.
On completion of the eight data bits, the A8290 releases the SDA
line before the ninth clock cycle, in order to allow the master to
acknowledge the data. If the master holds the SDA line low dur-
ing this Acknowledge bit, the A8290 responds by sending the
data from register 2 to the master. Data bytes continue to be sent
to the master until the master releases the SDA line during the
Acknowledge bit. When this is detected, the A8290 stops sending
data and waits for a stop signal.
Interrupt Request
The A8290 also provides an interrupt request pin, IRQ, which
is an open-drain, active-low output. This output may be connect-
ed to a common IRQ line with a suitable external pull-up and can
be used with other I 2 C?-compatible devices to request attention
from the master controller.
acknowledge
from LNBR
acknowledge
from LNBR
Start
Address
W
Control Data
Stop
SDA
0
0
0
1
0
A1
A0
0
AK
I1
I0
D5
D4
D3
D2
D1
D0
AK
SCL
1
2
3
4
5
6
7
8
9
Write to Register
acknowledge
from LNBR
no acknowledge
from master
Start
Address
R
Status Register 1
Stop
SDA
0
0
0
1
0
A1
A0
1
AK
D7
D6
D5
D4
D3
D2
D1
D0 NAK
SCL
1
2
3
4
5
6
7
8
9
Read One Byte from Register
acknowledge
from LNBR
acknowledge
from LNBR
no acknowledge
from master
Start
Address
R
Status Data in Register 1
Status Data in Register 2
Stop
SDA
0
0
0
1
0
A1
A0
1
AK
D7
D6
D5
D4
D3
D2
D1
D0
AK
-
-
-
-
D3
D2
D1
D0 NAK
SCL
1
2
3
4
5
6
7
8
9
Read Multiple Bytes from Register
Figure 3. I 2 C? Interface. Read and write sequences.
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
10
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| A8290SETTR-TB | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8291 | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8291SETTR-T | 功能描述:IC VOLTAGE REG SGL LNB 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| A8291SETTR-TB | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8292 | 制造商:AMPEX 功能描述: |
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