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参数资料
| 型号： | A8290SETTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC VOLTAGE REG SGL LNB 28-QFN |
| 标准包装： | 9,000 |
| 应用： | 转换器，模拟和数字式卫星信号接收器 |
| 输入电压： | 8 V ~ 16 V |
| 输出数： | 1 |
| 输出电压： | 12.7 V ~ 20.4 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-VFQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN/MLP 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
A8290
Single LNB Supply and Control Voltage Regulator
The IRQ output becomes active when either the A8290 first
recognizes a fault condition, or at power-on, when the main sup-
ply, V IN , and the internal logic supply, V REG , reach the correct
operating conditions. It is only reset to inactive when the I 2 C?
master addresses the A8290 with the Read/Write bit set (caus-
ing a read). Fault conditions are indicated by the TSD, VUV, and
OCP bits and are latched in the Status register. See the Status reg-
ister section for full description.
The DIS, PNG, CAD and TDET status bits do not cause an in-
terrupt. All these bits are continually updated, apart from the DIS
bit, which changes when the LNB is either disabled, intentionally
or due to a fault, or is enabled.
When the master recognizes an interrupt, it addresses all
slaves connected to the interrupt line in sequence, and then reads
the status register to determine which device is requesting atten-
tion. The A8290 latches all conditions in the Status register until
the completion of the data read. The action at the resampling
point is further defined in the Status Register section. The bits in
the Status register are defined such that the all-zero condition in-
dicates that the A8290 is fully active with no fault conditions.
When V IN is initially applied, the I 2 C?-compatible interface
does not respond to any requests until the internal logic supply
V REG has reached its operating level. Once V REG has reached this
point, the IRQ output goes active, and the VUV bit is set. After
the A8290 acknowledges the address, the IRQ flag is reset. After
the master reads the status registers, the registers are updated with
the VUV reset.
Start
Address
R
Status Register 1
Stop
SDA
0
0
0
1
0
A1
A0
1
AK
D7
D6
D5
D4
D3
D2
D1
D0 NAK
SCL
1
2
3
4
5
6
7
8
9
IRQ
Fault
Reload
Event
Read after Interrupt
Status Register
Figure 4. I 2 C? Interface. Read sequences after interrupt request.
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
11
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| A8290SETTR-TB | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8291 | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8291SETTR-T | 功能描述:IC VOLTAGE REG SGL LNB 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| A8291SETTR-TB | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8292 | 制造商:AMPEX 功能描述: |
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