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参数资料
| 型号： | A8290SETTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 9/20页 |
| 文件大小： | 0K |
| 描述： | IC VOLTAGE REG SGL LNB 28-QFN |
| 标准包装： | 9,000 |
| 应用： | 转换器，模拟和数字式卫星信号接收器 |
| 输入电压： | 8 V ~ 16 V |
| 输出数： | 1 |
| 输出电压： | 12.7 V ~ 20.4 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-VFQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN/MLP 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
A8290
Single LNB Supply and Control Voltage Regulator
EXTM pin (external modulation), in conjunction with the I 2 C?
control bits: TMODE (tone modulation) and TGATE (tone gate),
provide the necessary control. The TMODE bit controls whether
the tone source is either internal or external (via the EXTM pin).
Both the EXTM pin and TGATE bit determine the 22 kHz con-
trol, whether gated or clocked.
Four options for tone generation are shown in figure 2. Note
that when using option 4, when EXTM stops clocking, the LNB
volts park at the LNB voltage, either plus or minus half the tone
signal amplitude, depending on the state of EXTM. For example,
if the EXTM is held low, the LNB dc voltage is the LNB pro-
grammed voltage minus 325 mV (typical).
EXTM
TMODE
TGATE
With any of the four options, when a tone signal is generated,
TDET is set in the status register. When the internal tone is used
(options 1 or 2), the minimum tone detect amplitude is 400 mV,
and when an external tone is used (options 3 or 4), the minimum
tone detection amplitude is 300 mV.
DiSEqC? Bypass MOSFET
A pair of N-channel MOSFETs are connected in parallel (source
to drain and drain to source) to provide a low source output
impedance during tone transmission.
The MOSFETs are enabled either via the BFC input pin (ac-
tive low) or by setting the BFC2 bit to 1 in the Control register.
When the BFC pin is used instead of I 2 C? control, it is not
latched; a logic high or low turns the FET off or on. When the
I 2 C?-compatible interface is used, the BFC pin is not connected,
but the pull up resistor R5 must be present.
I 2 C?-Compatible Interface
Tone
(LNB Ref)
LNB (V)
This is a serial interface that uses two bus lines, SCL and SDA,
to access the internal Control and Status registers of the A8290.
Option 1 – Use internal tone, gated by the TGATE bit.
EXTM
TMODE
TGATE
Tone
Data is exchanged between a microcontroller (master) and the
A8290 (slave). The clock input to SCL is generated by the master,
while SDA functions as either an input or an open drain output,
depending on the direction of the data.
Timing Considerations
The control sequence of the communication through the I 2 C?-
compatible interface is composed of several steps in sequence:
(LNB Ref)
LNB (V)
1. Start Condition. Defined by a negative edge on the SDA line,
Option 2 – Use internal tone, gated by the EXTM pin.
EXTM
TMODE
while SCL is high.
2. Address Cycle. 7 bits of address, plus 1 bit to indicate read (1)
or write (0), and an acknowledge bit. The first five bits of the
address are fixed as: 00010. The four optional addresses, de-
fined by the remaining two bits, are selected by the ADD input.
TGATE
Tone
(LNB Ref)
LNB (V)
The address is transmitted MSB first.
3. Data Cycles.
Write – 6 bits of data and 2 bits for addressing four internal
control registers, followed by an acknowledge bit. See Control
Option 3 – Use external tone, gated by the TGATE bit.
EXTM
TMODE
Register section for more information.
Read – Two status registers, where register 1 is read first,
followed by register 2, then register 1, and so on. At the start
of any read sequence, register 1 is always read first. Data is
transmitted MSB first.
TGATE
Tone
(LNB Ref)
Option 4 – Use external tone.
Figure 2. Options for tone generation
LNB (V)
4. Stop Condition. Defined by a positive edge on the SDA line,
while SCL is high. Except to indicate a Start or Stop condi-
tion, SDA must be stable while the clock is high. SDA can
only be changed while SCL is low. It is possible for the Start or
Stop condition to occur at any time during a data transfer. The
A8290 always responds by resetting the data transfer sequence.
9
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| A8290SETTR-TB | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8291 | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8291SETTR-T | 功能描述:IC VOLTAGE REG SGL LNB 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| A8291SETTR-TB | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Single LNB Supply and Control Voltage Regulator |
| A8292 | 制造商:AMPEX 功能描述: |
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