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| 型号： | A8292SETTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | IC REG LNB SUPPLY/CONTROL 28-MLP |
| 标准包装： | 1 |
| 应用： | 转换器，模拟和数字式卫星信号接收器 |
| 输入电压： | 8 V ~ 16 V |
| 输出数： | 2 |
| 输出电压： | 12.7 V ~ 20.4 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-VFQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN/MLP 裸露焊盘（5x5） |
| 包装： | 标准包装 |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1187-6 |
A8292
Dual LNB Supply and Control Voltage Regulator
Table 6. Status Register 1
Bit
0
1
2
3
4
5
6
7
Name
DIS1
DIS2
OCP1
OCP2
PNG1
PNG2
TSD
VUV
Function
LNB output disabled (Channel 1)
LNB output disabled (Channel 2)
Overcurrent (Channel 1)
Overcurrent (Channel 2)
Power Not Good (Channel 1)
Power Not Good (Channel 2)
Thermal Shutdown
V IN Undervoltage
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
DIS1
DIS2
OCP1
OCP2
PNG1
PNG2
TSD
VUV
LNB Output Disabled. DIS is used to indicate the current condition of the LNB
output for channel 1. At power-on, or if a fault condition occurs, DIS1 is set. This
bit changing to 1 does not cause the IRQ to activate because the LNB output may
be disabled intentionally by the I 2 C? master. This bit will be reset at the end of a
write sequence if the LNB output is enabled.
See description for DIS1. This indicates status for channel 2.
Overcurrent. If the LNB output detects an overcurrent condition for greater than
48 ms, the LNB output will be disabled. The OCP bit will be set to indicate that an
overcurrent has occurred and the disable bit, DIS1, will be set. The Status register
is updated on the rising edge of the 9 th clock pulse in the data read sequence, where
the OCP bit is reset in all cases, allowing the master to reenable the LNB output.
If the overcurrent timer is not enabled, the device operates in current limit indefi-
nitely and the OCP bit will be set. If the overcurrent condition is removed, the OCP
bit will automatically be reset. Note that if the overcurrent remains long enough, and
a thermal shutdown occurs, the LNB output will be disabled and the TSD bit set.
See description for OCP1. This indicates status for channel 2.
Power Not Good. Set to 1 when the LNB voltage is below 85% of the programmed
voltage. The PNG bit is reset when the LNB voltage is within 90% of the pro-
grammed LNB voltage. PNG is always active so, if the LNB output is disabled,
then PNG will be a logic 1. At power-up, PNG reports a logic 1 until the LNB
output is enabled and within 90% of the programmed LNB voltage.
See description for PNG1. This indicates status for channel 2.
Thermal shutdown. 1 indicates that the A8292 has detected an overtemperature
condition and has disabled the LNB outputs. The disable bits, DIS x , will also be
set. The status of the overtemperature condition is sampled on the rising edge of
the 9 th clock pulse in the data read sequence. If the condition is no longer present,
then the TSD bit will be reset, allowing the master to reenable the LNB output if
required. If the condition is still present, then the TSD bit will remain at 1.
Undervoltage Lockout. 1 indicates that the A8292 has detected that the input sup-
ply, V IN is, or has been, below the minimum level and an undervoltage lockout has
occurred disabling the LNB outputs. The disable bits, DIS x , will also be set, and the
A8292 will not reenable the output until so instructed by writing the relevant bit into
the control registers. The status of the undervoltage condition is sampled on the ris-
ing edge of the 9 th clock pulse in the data read sequence. If the condition is no lon-
ger present, then the VUV bit will be reset allowing the master to reenable the LNB
output if required. If the condition is still present, then the VUV bit will remain at 1.
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
16
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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