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参数资料
| 型号： | A82DL32X4T |
| 厂商： | AMIC Technology Corporation |
| 英文描述： | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL32x4T(U) 32 Megabit (4Mx8 Bit/2Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash |
| 中文描述： | 堆叠式多芯片封装（MCP）闪存和SRAM，A82DL32x4T（ü）32兆位（4Mx8 Bit/2Mx16位）的CMOS 3.3伏只，同时闪电行动 |
| 文件页数： | 39/60页 |
| 文件大小： | 931K |
| 代理商： | A82DL32X4T |
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A82DL32x4T(U) Series
PRELIMINARY
(August, 2005, Version 0.0)
38
AMIC Technology, Corp.
AC CHARACTERISTICS
Hardware Reset (
RESET
)
Parameter
JEDEC
Std
Description
Test Setup
All Speed Options
Unit
t
READY
RESET
Pin Low (During Embedded
Algorithms) to Read or Write (See Note)
Max
20
μ
s
t
READY
RESET
Pin Low (Not During Embedded
Algorithms) to Read or Write (See Note)
Max
500
ns
t
RP
RESET
Pulse Width
Min
500
ns
t
RH
RESET
High Time Before Read (See Note)
Min
50
ns
t
RB
RY/
BY
Recovery Time
Min
0
ns
t
RPD
RESET
Low to Standby Mode
Min
20
μ
s
Note:
Not 100% tested.
Figure 12.
RESET
Timings
CE_F, OE
RESET
t
RH
t
RP
t
Ready
Reset Timings NOT during Embedded Algorithms
RESET
t
RP
~
Reset Timings during Embedded Algorithms
RY/BY
~
t
RB
~
t
Ready
CE_F, OE
RY/BY
0V
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