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| 型号： | A8502KLPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 15/35页 |
| 文件大小： | 0K |
| 描述： | IC LED DVR WHITE MULTI 16-TSSOP |
| 标准包装： | 8,000 |
| 拓扑： | PWM，升压（升压） |
| 输出数： | 2 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 车载，背光 |
| 类型 - 次要： | 白色 LED |
| 频率： | 580kHz ~ 2MHz |
| 电源电压： | 5 V ~ 40 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 供应商设备封装： | 16-TSSOP-EP |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 125°C |
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A8502
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
V OUT
COMP
LED current setting and LED dimming
The maximum LED current can be up to 120 mA per channel,
C2
and is set through the ISET pin. To set the I LED current, connect
a resistor, R ISET , between this pin and ground, according to the
following formula:
R ISET = (1.003 × 980) / I LED
(2)
C1
C3
PWM
where I LED is in A and R ISET is in Ω . This sets the maximum cur-
rent through the LEDs, referred to as the 100% current . Standard
R ISET values, at gain equals 980, are as follows:
C4
I LED
t
Standard Closest R ISET
Resistor Value
(k Ω )
8.25
9.76
12.1
15.0
LED current per LED, I LED
(mA)
120
100
80
65
Figure 11B. Typical PWM diagram showing V OUT , I LED , and COMP pin as
well as the PWM signal. PWM dimming frequency is 500 Hz at 1% duty
cycle ; shows V OUT (ch1, 10 V/div.), COMP (ch2, 2 V/div.), PWM (ch3,
5 V/div.), and I LED (ch4, 50 mA/div.), time = 500 μ s/div.
PWM
PWM dimming
The LED current can be reduced from the 100% current level
by PWM dimming using the PWM/EN pin. When the PWM/EN
pin is pulled high, the A8502 turns on and all enabled LEDs sink
100% current. When PWM/EN is pulled low, the boost converter
and LED sinks are turned off. The compensation (COMP) pin is
floated, and critical internal circuits are kept active. The typical
PWM dimming frequencies fall between 200 Hz and 1 kHz. Fig-
C1
C2
I LED
ures 11A to 11D provide examples of PWM switching behavior.
V OUT
COMP
t
Figure 11C. Delay from rising edge of PWM signal to LED current; shows
PWM (ch1, 2 V/div.), and I LED (ch2, 50 mA/div.), time = 200 ns/div.
PWM
C2
C1
C3
PWM
C1
I LED
C2
C4
I LED
t
Figure 11A. Typical PWM diagram showing V OUT , I LED , and COMP pin as
well as the PWM signal. PWM dimming frequency is 500 Hz at 50% duty
cycle; shows V OUT (ch1, 10 V/div.), COMP (ch2, 2 V/div.), PWM (ch3,
5 V/div.), and I LED (ch4, 50 mA/div.), time = 500 μ s/div.
t
Figure 11D. Delay from falling edge of PWM signal to LED current turn off;
shows PWM (ch1, 2 V/div.), and I LED (ch2, 50 mA/div.), time = 200 ns/div.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
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