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参数资料
| 型号： | A8502KLPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 22/35页 |
| 文件大小： | 0K |
| 描述： | IC LED DVR WHITE MULTI 16-TSSOP |
| 标准包装： | 8,000 |
| 拓扑： | PWM，升压（升压） |
| 输出数： | 2 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 车载，背光 |
| 类型 - 次要： | 白色 LED |
| 频率： | 580kHz ~ 2MHz |
| 电源电压： | 5 V ~ 40 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 供应商设备封装： | 16-TSSOP-EP |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 125°C |
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A8502
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Input overcurrent protection and disconnect switch
The primary function of the input disconnect switch is to protect
the system and the device from catastrophic input currents during
a fault condition. The external circuit implementing the discon-
nect is shown in figure 28. If the input disconnect switch is not
used, the VSENSE pin must be tied to VIN and the GATE pin
must be left open.
When selecting the external PMOS, check for the following
C1
FAULT
I IN
(1) Initial fault
detected
(3) I IN limited to 3 A
parameters:
? Drain-source breakdown voltage V (BR)DSS > –40 V
? Gate threshold voltage (make sure it is fully conducting at
C2
(2) Disconnect switch
goes into a linear mode
V GS = -4 V, and cut-off at –1 V)
? R DS(on) : Make sure the on-resistance is rated at V GS = -4.5 V or
similar, not at -10 V; derate it for higher temperature
The input disconnect switch has two modes of operation:
C3
C4
GATE
PWM/EN
(4) After 12.5 ms,
disconnect switch
shuts down
? 1X mode When the input current is between one and two times
the preset current limit value, the disconnect switch enters a con-
stant-current mode for a maximum duration of 10,000 cycles or
5 ms at 2 MHz. During this time, the Fault flag is set immediately
and the disconnect switch goes into a linear mode of operation,
in which the input current will be limited to a value approximate
to the 1X current trip point level (figure 29). If the fault corrects
itself before the expiration of the timer, the Fault flag will be
removed and normal operation will resume.
The user can also during this time decide whether to shut down
t
Figure 29. Showing typical wave forms for a 3-A, 1X current limit under a
fault condition; shows f SW = 800 kHz, ˉFˉ ˉA ˉUˉˉLˉ ˉTˉ (ch1, 5 V/div.), I IN (ch2, 2 A/
div.), GATE (ch3, 5 V/div.), and PWM/EN (ch4, 5 V/div.), time = 5 ms/div.
FAULT
the A8502. To immediately shut down the device, pull the FSET/
SYNC pin low for more than 7 μ s. After the FSET/SYNC pin has
been low for a period longer than 7 μ s, the IC will stop switching,
C1
Fault flag set at
1X trip point
the input disconnect switch will open, and the LEDx pins will
stop sinking current. The A8502 can be powered-down into low
C2
GATE
A8502 shuts down at
2X trip point
power mode. To do so, disable the IC by keeping the PWM/EN
pin low for a period of 32,750 clock cycles. To keep the discon-
C3
I IN
V IN
R SC
Q1
To L1
C4
PWM/EN
R ADJ
R C
C C
t
Figure 30. 2X mode, secondary overcurrent fault condition. I IN is the input
current through the switch. The Fault flag is set at the 1X current limit, and
GATE
VSENSE
VIN
A8502
when the 2X current limit is reached the A8502 disables the gate of the
disconnect switch (GATE); shows ˉFˉ ˉA ˉUˉˉLˉ ˉTˉ (ch1, 5 V/div.), GATE (ch2,
10 V/div.), I IN (ch3, 2 A/div.), and PWM/EN (ch4, 5 V/div.), time = 5 μ s/div.
Figure 28. Typical circuit showing the implementation of the input
disconnect feature.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
22
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