参数资料
型号: A8510GECTR-T
厂商: Allegro Microsystems Inc
文件页数: 12/33页
文件大小: 0K
描述: IC LED DRVR BCKLGHT/WHT 26QFN-EC
标准包装: 1
拓扑: PWM,升压(升压)
输出数: 8
内部驱动器:
类型 - 主要: 背光
类型 - 次要: 白色 LED
频率: 600kHz ~ 2.25MHz
电源电压: 5 V ~ 40 V
安装类型: 表面贴装
封装/外壳: 26-WFQFN 裸露焊盘
供应商设备封装: 26-QFN/MLP-EP(4x4)
包装: 标准包装
工作温度: -40°C ~ 105°C
其它名称: 620-1385-6
A8510
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Inrush current caused by
enabling the disconnect
switch (when used)
Normal operation
I SW(lim)
Soft start function
During soft start the LEDx pins are set to sink (I LEDSS ) and the
boost switch current is reduced to the I SWSS(LIM) level to limit
the inrush current generated by charging the output capacitors.
C1
C2
I OUT
I IN
Operation during
I SWSS(lim)
When the converter senses that there is enough voltage on the
LEDx pins, the converter proceeds to increase the LED current
to the preset regulation current and the boost switch current limit
is switched to the I SW(LIM) level to allow the A8510 to deliver the
necessary output power to the LEDs. This is shown in figure 7.
C3
C4
V OUT
Frequency selection
The switching frequency on the boost regulator is set by the
resistor connected to the FSET/SYNC pin, and the switching
frequency can be can be anywhere from 580 kHz to 2.3 MHz.
Figure 6 shows the typical switching frequencies for given resis-
tor values.
If during operation a fault occurs that will increase the switch-
EN/PWM
t
Figure 7. Startup diagram showing the input current, output voltage, and
output current, f SW = 800 kHz; shows I OUT (ch1, 500 mA/div.), I IN (ch2, 1 A/
div.), V OUT (ch3, 20 V/div.), and EN/PWM (ch4, 5 V/div.), t = 1 ms/div.
V OUT
ing frequency, the FSET/SYNC pin is clamped to a maximum
switching frequency of no more than 3.5 MHz.
Synchronization
The A8510 can also be synchronized using an external clock on
the FSET/SYNC pin. Figure 8 shows the correspondence of a
SYNC signal and the SW pin, and figure 9 shows the result when
a SYNC signal is detected: the LED current does not show any
variation while the frequency synchronization occurs. At power-
up if the FSET/SYNC pin is held low, the IC will not power-up.
C1
C2
C3
I LED
FSET/SYNC
SW node
Only when the FSET/SYNC pin is tri-stated to allow for the pin
to rise, to about 1 V, or when a sync clock is detected, will the
A8510 try to power-up.
C4
t
Figure 8. Diagram showing a synchronized FSET/SYNC pin and switch
node; shows V OUT (ch1, 20 V/div.), I LED (ch2, 200 mA/div.), FSET/SYNC
(ch3, 2 V/div.), and SW node (ch4, 20 V/div.), t = 2 μ s/div.
V OUT
2.1
1.9
1.7
1.5
1.3
C1
C2
I OUT
FSET/SYNC
1.1
0.9
0.7
C3
800 kHz operation
SW node
1.5 MHz operation
0.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
30.0
32.5
35.0
Resistance for R SET (k Ω )
Figure 6. Typical Switching Frequency versus value of R FSET resistor.
C4
t
Figure 9. Transition of the SW waveform when the SYNC pulse is
detected. The A8510 switching at 800 kHz, applied SYNC pulse at
1.5 MHz; shows V OUT (ch1, 20 V/div.), I OUT (ch2, 500 mA/div.), FSET/
SYNC (ch3, 2 V/div.), and SW node (ch4, 20 V/div.), t = 2 μ s/div.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
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