参数资料
型号: A8510GECTR-T
厂商: Allegro Microsystems Inc
文件页数: 13/33页
文件大小: 0K
描述: IC LED DRVR BCKLGHT/WHT 26QFN-EC
标准包装: 1
拓扑: PWM,升压(升压)
输出数: 8
内部驱动器:
类型 - 主要: 背光
类型 - 次要: 白色 LED
频率: 600kHz ~ 2.25MHz
电源电压: 5 V ~ 40 V
安装类型: 表面贴装
封装/外壳: 26-WFQFN 裸露焊盘
供应商设备封装: 26-QFN/MLP-EP(4x4)
包装: 标准包装
工作温度: -40°C ~ 105°C
其它名称: 620-1385-6
A8510
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
The basic requirement of the SYNC signal is 150 ns minimum
on-time and 150 ns minimum off time, as indicated by the speci-
fications for t PWSYNCON and t PWSYNCOFF . Figure 10 shows the
timing for a synchronization clock into the A8510 at 800 kHz.
Thus any pulse with a duty cycle of 12% to 88% at 800 kHz can
be used to synchronize the IC.
The SYNC pulse duty cycle ranges for selected switching fre-
quencies are:
LED current setting and LED dimming
The maximum LED current can be up to 40 mA per channel, and
is set through the ISET pin. To set the I LED current, connect a
resistor, R ISET , between this pin and GND, according to the fol-
lowing formula:
R ISET = (1.003 × 327) / I LED (2)
where I LED is in mA and R ISET is in Ω . This sets the maximum
current through the LEDs, referred to as the 100% current . Stan-
dard R ISET values, at gain equals 327, are as follows:
SYNC Pulse Frequency
(kHz)
2200
2000
1000
800
600
Duty Cycle Range
(%)
33 to 66
30 to 70
15 to 85
12 to 88
9 to 91
Standard Resistor Value
Closest to R ISET
(k Ω )
8.25
10.5
13.0
16.2
LED current per LED, I LED
(mA)
40
30
25
20
If during operation a SYNC clock is lost, the IC will revert to the
preset switching frequency that is set by the resistor R FSET . Dur-
ing this period the IC will stop switching for a maximum period
of about 7 μ s to allow the sync detection circuitry to switch over
to the externally preset switching frequency.
If the clock is held low for more than 7 μ s, the A8510 will shut
down. In this shutdown mode the IC will stop switching, the
input disconnect switch is open, and the LEDs will stop sinking
current. To shutdown the IC into low power mode, the IC must be
disabled by keeping the EN/PWM pin low for a period of 32750
clock cycles. If the FSET/SYNC pin is released at any time after
7 μ s, the A8510 will proceed to soft start.
PWM dimming
The LED current can be reduced from the 100% current level
by PWM dimming using the EN/PWM pin. When the EN/PWM
pin is pulled high, the A8510 turns on and all enabled LEDs sink
100% current. When EN/PWM is pulled low, the boost converter
and LED sinks are turned off. The compensation (COMP) pin is
floated, and critical internal circuits are kept active. The typical
PWM dimming frequencies fall between 200 Hz and 1 kHz. Fig-
ures 12A to 12D provide examples of PWM switching behavior.
Another important feature of the A8510 is the PWM signal to
LED current delay. This delay is typically less than 500 ns, which
allows greater accuracy at low PWM dimming duty cycles, as
shown in figure 11.
t PWSYNCON
150 ns
950 ns
10
8
6
Worst-case
Typical
4
2
T = 1.25 μ s
150 ns
t PWSYNCOFF
0
0.1
1 10
PWM Duty Cycle, D (%)
100
Figure 10. SYNC pulse on and off time requirements, for an
800-kHz clock.
Figure 11. Percentage Error of the LED current versus PWM duty cycle
(at 200 Hz PWM frequency), for 500 ns delay.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
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