参数资料
| 型号： | AD5231BRU50 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/28页 |
| 文件大小： | 0K |
| 描述： | IC DGTL POT 1024POS 16-TSSOP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 96 |
| 接片： | 1024 |
| 电阻（欧姆）： | 50k |
| 电路数： | 1 |
| 温度系数： | 标准值 600 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | 4 线 SPI（芯片选择） |
| 电源电压： | 2.7 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 管件 |
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AD5231
Data Sheet
Rev. D | Page 18 of 28
ADVANCED CONTROL MODES
The AD5231 digital potentiometer includes a set of user
programming features to address the wide number of
applications for these universal adjustment devices.
Key programming features include:
Scratchpad programming to any desirable values
Nonvolatile memory storage of the scratchpad RDAC register
value in the EEMEM register
Increment and decrement instructions for the RDAC wiper
register
Left and right bit shift of the RDAC wiper register to achieve
±6 dB level changes
28 extra bytes of user-addressable nonvolatile memory
Linear Increment and Decrement Instructions
The increment and decrement instructions (14, 15, 6, and 7) are
useful for linear step-adjustment applications. These commands
simplify microcontroller software coding by allowing the
controller to send just an increment or decrement command to
the device.
For an increment command, executing Instruction 14 with the
proper address automatically moves the wiper to the next
resistance segment position. Instruction 15 performs the same
function, except that the address does not need to be specified.
Logarithmic Taper Mode Adjustment
Four programming instructions produce logarithmic taper
increment and decrement of the wiper. These settings are
activated by the 6 dB increment and 6 dB decrement
instructions (12, 13, 4, and 5). For example, starting at zero
scale, executing the increment Instruction 12 eleven times
moves the wiper in 6 dB per step from 0% to full scale, RAB. The
6 dB increment instruction doubles the value of the RDAC
register contents each time the command is executed. When the
wiper position is near the maximum setting, the last 6 dB
increment instruction causes the wiper to go to the full-scale
1023 code position. Further 6 dB per increment instructions do
not change the wiper position beyond its full scale.
The 6 dB step increments and 6 dB step decrements are
achieved by shifting the bit internally to the left or right,
respectively. The following information explains the nonideal
±6 dB step adjustment under certain conditions. Table 8
illustrates the operation of the shifting function on the RDAC
register data bits. Each table row represents a successive shift
operation. Note that the left-shift 12 and 13 instructions were
modified such that, if the data in the RDAC register is equal to
zero and the data is shifted left, the RDAC register is then set to
Code 1. Similarly, if the data in the RDAC register is greater
than or equal to midscale and the data is shifted left, then the
data in the RDAC register is automatically set to full scale. This
makes the left-shift function as ideal a logarithmic adjustment
as possible.
The right-shift 4 and 5 instructions are ideal only if the LSB is 0
(ideal logarithmic = no error). If the LSB is 1, the right-shift
function generates a linear half-LSB error, which translates to
a number-of-bits dependent logarithmic error, as shown in
Figure 42. The plot shows the error of the odd numbers of bits
for the AD5231.
Table 8. Detail Left-Shift and Right-Shift Functions
for 6 dB Step Increment and Decrement
Left-Shift
(+6 dB/step)
Left-Shift
Right-Shift
Right-Shift
(–6 dB/step)
00 0000 0000
11 1111 1111
00 0000 0001
01 1111 1111
00 0000 0010
00 1111 1111
00 0000 0100
00 0111 1111
00 0000 1000
00 0011 1111
00 0001 0000
00 0001 1111
00 0010 0000
00 0000 1111
00 0100 0000
00 0000 0111
00 1000 0000
00 0000 0011
01 0000 0000
00 0000 0001
10 0000 0000
00 0000 0000
11 1111 1111
00 0000 0000
11 1111 1111
00 0000 0000
Actual conformance to a logarithmic curve between the data
contents in the RDAC register and the wiper position for each
right-shift 4 and 5 command execution contains an error only
for odd numbers of bits. Even numbers of bits are ideal. The
graph in Figure 42 shows plots of Log_Error [20 × log10
(error/code)] for the AD5231. For example, Code 3 Log_Error
= 20 × log10 (0.5/3) = 15.56 dB, which is the worst case. The
plot of Log_Error is more significant at the lower codes.
CODE (From 1 to 1023 by 2.0 × 103)
0
(d
B)
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
0
–40
–20
–60
–80
02739-
041
Figure 42. Plot of Log_Error Conformance for Odd Numbers of Bits Only
(Even Numbers of Bits Are Ideal)
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| AD5231BRU50-REEL7 | 功能描述:IC DGTL POT 1024POS 16-TSSOP TR RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数字电位器 系列:- 标准包装:2,500 系列:XDCP™ 接片:256 电阻（欧姆）:100k 电路数:1 温度系数:标准值 ±300 ppm/°C 存储器类型:非易失 接口:I²C（设备位址） 电源电压:2.7 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:14-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:14-TSSOP 包装:带卷 (TR) |
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| AD5231BRUZ10 | 制造商:Analog Devices 功能描述:Digital Potentiometer (Pots) IC |
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