参数资料
型号: AD5320BRT-500RL7
厂商: Analog Devices Inc
文件页数: 3/20页
文件大小: 0K
描述: IC DAC 12BIT R-R W/BUFF SOT23-6
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 1
设置时间: 8µs
位数: 12
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
电压电源: 单电源
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: SOT-23-6
供应商设备封装: SOT-23-6
包装: 标准包装
输出数目和类型: 1 电压,双极
采样率(每秒): 125k
其它名称: AD5320BRT500RL7DKR
AD5320
Rev. C | Page 11 of 20
THEORY OF OPERATION
D/A SECTION
The AD5320 DAC is fabricated on a CMOS process. The
architecture consists of a string DAC followed by an output
buffer amplifier. Because there is no reference input pin, the
power supply (VDD) acts as the reference. Figure 23 shows a
block diagram of the DAC architecture.
VDD
VOUT
GND
RESISTOR
STRING
REF (+)
REF (–)
OUTPUT
AMPLIFIER
DAC REGISTER
00
93
4-
0
23
Figure 23. DAC Architecture
Since the input coding to the DAC is straight binary, the ideal
output voltage is given by:
×
=
4096
D
V
DD
OUT
where D = decimal equivalent of the binary code that is loaded
to the DAC register; it can range from 0 to 4095.
RESISTOR STRING
The resistor string section is shown in Figure 24. It is simply a
string of resistors, each of value R. The code loaded to the DAC
register determines at which node on the string the voltage is
tapped off to be fed into the output amplifier. The voltage is
tapped off by closing one of the switches connecting the string
to the amplifier. Because it is a string of resistors, it is
guaranteed monotonic.
R
TO OUTPUT
AMPLIFIER
00
93
4-
0
24
Figure 24. Resistor String
OUTPUT AMPLIFIER
The output buffer amplifier is capable of generating rail-to-rail
voltages on its output that gives an output range of 0 V to VDD. It
is capable of driving a load of 2 kΩ in parallel with 1000 pF to
GND. The source and sink capabilities of the output amplifier
can be seen in Figure 11 and Figure 12. The slew rate is 1 V/μs
with a half-scale settling time of 8 μs with the output unloaded.
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