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参数资料
| 型号： | AD5390BCP-3-REEL |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | DAC |
| 英文描述： | 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs |
| 中文描述： | SERIAL INPUT LOADING, 8 us SETTLING TIME, 14-BIT DAC, QCC64 |
| 封装： | 9 X 9 MM, MO-220VMMD-4, LFCSP-64 |
| 文件页数： | 36/44页 |
| 文件大小： | 1319K |
| 代理商： | AD5390BCP-3-REEL |
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AD5390/AD5391/AD5392
AD539x to PIC16C6x/7x
The PIC16C6x/7x synchronous serial port (SSP) is configured
as an SPI master with the clock polarity bit = 0. This is done by
writing to the synchronous serial port control register
(SSPCON). See the PIC16/17 Microcontroller User Manual.
In Figure 27, I/O port RA1 is used to pulse SYNC and enable
the serial port of the AD539x. This microcontroller transfers
only eight bits of data during each serial transfer operation;
therefore, three consecutive read/write operations are needed,
depending on the mode. Figure 37 shows the connection
diagram.
Rev. A | Page 36 of 44
0
DV
DD
PIC16C6x/7x
AD539x
RESET
SDO
SDI/RC4
DIN
SDO/RC5
SCLK
SCK/RC3
SER/PAR
RA1
SYNC
SPI/1
2
C
Figure 37. AD539x to PIC16C6X/7X Interface
AD539x to 8051
The AD539x requires a clock synchronized to the serial data.
The 8051 serial interface must, therefore, be operated in mode 0.
In this mode, serial data enters and exits through RxD and a
shift clock is output on TxD. Figure 38 shows how the 8051 is
connected to the AD539x. Because the AD539x shifts data out
on the rising edge of the shift clock and latches data in on the
falling edge, the shift clock must be inverted. The AD539x
requires its data with the MSB first. Because the 8051 outputs
the LSB first, the transmit routine must take this into account.
0
DV
DD
DV
DD
8xC51
SDO
DIN
AD539x
RESET
RxD
SCLK
TxD
SER/PAR
P1.1
SYNC
SPI/1
2
C
Figure 38. AD539x to 8051 Interface
AD539x to ADSP2101/ADSP2103
Figure 39 shows a serial interface between the AD539x and the
ADSP2101/ADSP2103. The ADSP2101/ADSP2103 should be
set up to operate in the SPORT transmit alternate framing
mode. The ADSP2101/ADSP2103 SPORT is programmed
through the SPORT control register and should be configured
as follows: internal clock operation, active low framing, and
16-bit word length. Transmission is initiated by writing a word
to the Tx register after the SPORT has been enabled.
0
DV
DD
ADSP2101/
ADSP2103
AD539x
RESET
DIN
DT
SDO
DR
SCLK
SCK
TFS
RFS
SYNC
SPI/I
2
C
Figure 39. AD539x to ADSP2101/ADSP2103 Interface
相关PDF资料 |
PDF描述 |
|---|---|
| AD5391BCP-3-REEL | 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs |
| AD5391BST-3 | 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs |
| AD5391BST-5 | 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs |
| AD5391BST-5-REEL | 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs |
| AD5392 | 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD5390BCP-3-REEL7 | 制造商:Analog Devices 功能描述:DAC 16-CH Resistor-String 14-bit 64-Pin LFCSP EP T/R |
| AD5390BCP-5 | 制造商:Analog Devices 功能描述:DAC 16-CH Resistor-String 14-bit 64-Pin LFCSP EP 制造商:Analog Devices 功能描述:14BIT DAC 16CH 5V 5390 LFCSP-64 |
| AD5390BCP-5-REEL | 制造商:Analog Devices 功能描述:DAC 16-CH Resistor-String 14-bit 64-Pin LFCSP EP T/R |
| AD5390BCP-5-REEL7 | 制造商:Analog Devices 功能描述:DAC 16-CH Resistor-String 14-bit 64-Pin LFCSP EP T/R |
| AD5390BCP-U1 | 制造商:Analog Devices 功能描述:DAC HEXADECIMAL RES-STRING 14BIT 64LFCSP - Bulk |
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