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| 型号： | AD5734RBREZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 25/32页 |
| 文件大小： | 0K |
| 描述： | IC DAC 14BIT DSP/SRL 24TSSOP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 设计资源： | Software Configurable 14-Bit Quad-Channel Unipolar/Bipolar Voltage Output Using AD5734R (CN0084) |
| 标准包装： | 1,000 |
| 设置时间： | 10µs |
| 位数： | 14 |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 4 |
| 电压电源： | 双 ± |
| 功率耗散（最大）： | 310mW |
| 工作温度： | -40°C ~ 80°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 4 电压，单极；4 电压，双极 |
| 采样率（每秒）： | 100k |
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AD5724R/AD5734R/AD5754R
Rev. E | Page 31 of 32
APPLICATIONS INFORMATION
+5 V/±5 V OPERATION
When operating from a single +5 V supply or a dual ±5 V supply,
an output range of +5 V or ±5 V is not achievable because
sufficient headroom for the output amplifier is not available.
In this situation, a reduced reference voltage can be used; for
instance, if a 2 V reference produces an output range of +4 V
or ±4 V, the 1 V of headroom is more than enough for full
operation. A standard value voltage reference of 2.048 V can
be used to produce output ranges of +4.096 V and ±4.096 V.
Refer to the Typical Performance Characteristics plots for
performance data at a range of voltage reference values.
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. Design the printed circuit board on
which the AD5724R/AD5734R/AD5754R are mounted so that
the analog and digital sections are separated and confined to
certain areas of the board. If the AD5724R/AD5734R/ AD5754R
are in a system which multiple devices require an AGND-to-
DGND connection, the connection should be made at one
point only. Establish the star ground point as close as possible
to the device.
Bypass the AD5724R/AD5734R/AD5754R with an ample
supply of a 10 μF capacitor in parallel with a 0.1 μF capacitor
on each supply located as close to the package as possible,
ideally right up against the device. The 10 μF capacitors are
the tantalum bead type. The 0.1 μF capacitor should have
low effective series resistance (ESR) and low effective series
inductance (ESI) such as the common ceramic types, which
provide a low impedance path to ground at high frequencies
to handle transient currents due to internal logic switching.
The power supply lines of the AD5724R/AD5734R/AD5754R
should use as large a trace as possible to provide low impedance
paths and reduce the effects of glitches on the power supply
line. Shield fast switching signals such as clocks with digital
ground to avoid radiating noise to other parts of the board
and never run them near the reference inputs. A ground line
routed between the SDIN and SCLK lines helps reduce crosstalk
between them (this is not required on a multilayer board that
has a separate ground plane, but separating the lines does help).
It is essential to minimize noise on the REFIN line because it
couples through to the DAC output.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feed through the board. A
microstrip technique is by far the best but not always possible
with a double-sided board. In this technique, the component
side of the board is dedicated to the ground plane, while signal
traces are placed on the solder side.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. The
i
Coupler family of products from Analog Devices, Inc., provides
voltage isolation in excess of 2.5 kV. The serial loading structure
of the AD5724R/AD5734R/AD5754R makes them ideal for
isolated interfaces because the number of interface lines is kept
to a minimum. Figure 49 shows a 4-channel isolated interface to
the AD5724R/AD5734R/AD5754R using an ADuM1400. For
further information, visit http://www.analog.com/icouplers.
ENCODE
DECODE
ENCODE
DECODE
ENCODE
DECODE
VIA
VIB
VIC
VID
VOA
VOB
VOC
VOD
ENCODE
DECODE
ADuM1400*
MICROCONTROLLER
SERIAL CLOCK OUT
SERIAL DATA OUT
SYNC OUT
CONTROL OUT
TO SCLK
TO SDIN
TO SYNC
TO LDAC
*ADDITIONAL PINS OMITTED FOR CLARITY.
06
46
5-
0
11
Figure 49. Isolated Interface
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5724R/AD5734R/AD5754R
is via a serial bus that uses a standard protocol compatible with
microcontrollers and DSP processors. The communications
channel is a 3-wire (minimum) interface consisting of a clock
signal, a data signal, and a synchronization signal. The AD5724R/
AD5734R/AD5754R require a 24-bit data-word with data valid
on the falling edge of SCLK.
For all interfaces, the DAC output update can be initiated
automatically when all the data is clocked in, or it can be
performed under the control of LDAC. The contents of the
registers can be read using the readback function.
AD5724R/AD5734R/AD5754R to Blackfin DSP interface
Figure 50 shows how the AD5724R/AD5734R/AD5754R can be
interfaced to a Blackfin DSP from Analog Devices. The Blackfin
has an integrated SPI port that can be connected directly to the
SPI pins of the AD5724R/AD5734R/AD5754R and the program-
mable I/O pins that can be used to set the state of a digital input
such as the LDAC pin.
SYNC
ADSP-BF531
AD5724R/
AD5734R/
AD5754R
SCLK
SDIN
SPISELx
SCK
MOSI
LDAC
PF10
06
46
5
-01
2
Figure 50. AD5724R/AD5734R/AD5754R-to-Blackfin Interface
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