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| 型号： | AD5821ABCBZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/17页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT CURRENTSINK 9WLCSP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 产品变化通告： | 8mm Carrier Tape Changes 28/Feb/2012 |
| 标准包装： | 10,000 |
| 设置时间： | 250µs |
| 位数： | 10 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 5mW |
| 工作温度： | -30°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 9-UFBGA，WLCSP |
| 供应商设备封装： | 9-WLCSP（1.52 x 1.69） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 1 电流，单极 |
| 采样率（每秒）： | * |
AD5821
Rev. 0 | Page 4 of 16
AC SPECIFICATIONS
VDD = 2.7 V to 5.5 V, AGND = DGND = 0 V, load resistance RL = 25 Ω connected to VDD, unless otherwise noted.
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
Output Current Settling Time
250
μs
VDD = 3.6 V, RL = 25 Ω, LL = 680 μH, scale to scale change (0x100 to 0x300)
Slew Rate
0.3
mA/μs
Major Code Change Glitch Impulse
0.15
nA-s
1 LSB change around major carry
0.06
nA-s
1 Temperature range is as follows: B Version = 40°C to +85°C.
2 Guaranteed by design and characterization; not production tested.
3 See the
section.
Terminology
TIMING SPECIFICATIONS
VDD = 2.7 V to 3.6 V. All specifications TMIN to TMAX, unless otherwise noted.
Table 3.
B Version
Limit at TMIN, TMAX
Unit
Description
fSCL
400
kHz max
SCL clock frequency
t1
2.5
μs min
SCL cycle time
t2
0.6
μs min
tHIGH, SCL high time
t3
1.3
μs min
tLOW, SCL low time
t4
0.6
μs min
tHD, STA, start/repeated start condition hold time
t5
100
ns min
tSU, DAT, data setup time
0.9
μs max
tHD, DAT, data hold time
0
μs min
t7
0.6
μs min
tSU, STA, setup time for repeated start
t8
0.6
μs min
tSU, STO, stop condition setup time
t9
1.3
μs min
tBUF, bus free time between a stop condition and a start condition
t10
300
ns max
tR, rise time of both SCL and SDA when receiving
0
ns min
May be CMOS driven
t11
250
ns max
tF, fall time of SDA when receiving
300
ns max
tF, fall time of both SCL and SDA when transmitting
ns min
CB
400
pF max
Capacitive load for each bus line
1 Guaranteed by design and characterization; not production tested.
2 A master device must provide a hold time of at least 300 ns for the SDA signal (referred to the VINHMINof the SCL signal) to bridge the undefined region of the SCL falling edge.
3 CB is the total capacitance of one bus line in pF. tR and tF are measured between 0.3 VDD and 0.7 VDD.
Timing Diagram
05
95
0-
0
02
SDA
t9
SCL
t3
t10
t11
t4
t6
t2
t5
t7
t1
t8
START
CONDITION
REPEATED
START
CONDITION
STOP
CONDITION
Figure 2. 2-Wire Serial Interface Timing Diagram
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相关代理商/技术参数 |
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| AD5821ABCBZ-REEL7 | 功能描述:IC DAC 10BIT CURRENTSINK 9-WLCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 设置时间:4µs 位数:12 数据接口:串行 转换器数目:2 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-uMAX 包装:管件 输出数目和类型:2 电压，单极 采样率（每秒）:* 产品目录页面:1398 (CN2011-ZH PDF) |
| AD5821AD-WAFER | 制造商:AD 制造商全称:Analog Devices 功能描述:120 mA, Current Sinking, 10-Bit, I2C DAC |
| AD5821A-WAFER | 制造商:AD 制造商全称:Analog Devices 功能描述:120 mA, Current Sinking, 10-Bit, I2C DAC |
| AD5821BCBZ-REEL | 功能描述:IC DAC 10BIT CURRENTSINK 9WLCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:2,400 系列:- 设置时间:- 位数:18 数据接口:串行 转换器数目:3 电压电源:模拟和数字 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:36-TFBGA 供应商设备封装:36-TFBGA 包装:带卷 (TR) 输出数目和类型:* 采样率（每秒）:* |
| AD5821BCBZ-REEL1 | 制造商:AD 制造商全称:Analog Devices 功能描述:120 mA, Current Sinking, 10-Bit, I2C DAC |
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