参数资料
型号: AD5821ABCBZ-REEL
厂商: Analog Devices Inc
文件页数: 6/17页
文件大小: 0K
描述: IC DAC 10BIT CURRENTSINK 9WLCSP
产品培训模块: Data Converter Fundamentals
DAC Architectures
产品变化通告: 8mm Carrier Tape Changes 28/Feb/2012
标准包装: 10,000
设置时间: 250µs
位数: 10
数据接口: 串行
转换器数目: 1
电压电源: 单电源
功率耗散(最大): 5mW
工作温度: -30°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 9-UFBGA,WLCSP
供应商设备封装: 9-WLCSP(1.52 x 1.69)
包装: 带卷 (TR)
输出数目和类型: 1 电流,单极
采样率(每秒): *
AD5821
Rev. 0 | Page 13 of 16
When sinking the maximum current of 120 mA, the maximum
voltage drop allowed across RSENSE is 400 mV, and the minimum
drain to source voltage of Q1 is 200 mV. This means that the
AD5821 output has a compliance voltage of 600 mV. If VDROP
falls below 600 mV, the output transistor, Q1, can no longer
operate properly and ISINK may not be maintained as a constant.
When sinking 90 mA, the maximum voltage drop allowed
across RSENSE is 300 mV, and the minimum drain to source
voltage of Q1 is 180 mV. This means that the AD5821 output
has a compliance voltage of 480 mV. If VDROP falls below 480 mV,
the output transistor, Q1, can no longer operate properly and
ISINK may not be maintained as a constant. As ISINK decreases, the
voltage required across the transistor, Q1, also decreases and,
therefore, lower supplies can be used with the voice coil motor.
As the current increases to 120 mA through the voice coil,
VC increases. VDROP decreases and eventually approaches the
minimum specified compliance voltage of 600 mV (or 480 mV,
if ISINK = 90 mA). The ground return path is modeled by the
components RG and LG. The track resistance between the voice
coil and the AD5821 is modeled as RT. The inductive effects of
LG influence RSENSE and RC equally, and because the current is
maintained as a constant, it is not as critical as the purely resistive
component of the ground return path. When the maximum sink
current is flowing through the motor, the resistive elements, RT and
RG, may have an impact on the voltage headroom of Q1 and
could, in turn, limit the maximum value of RC because of
voltage compliance.
For example, if
VBATTERY = 3.6 V
RG = 0.5 Ω
RT = 0.5 Ω
ISINK = 120 mA
VDROP = 600 mV (the compliance voltage)
Then the largest value of resistance of the voice coil, RC, is
=
×
+
×
+
=
SINK
G
SINK
T
SINK
DROP
BAT
C
I
R
I
R
I
V
R
)]
(
)
(
[
Ω
24
mA
120
Ω)]
0.5
mA
(120
2
mV
[600
V
3.6
=
×
+
Using another example, if
VBATTERY = 3.6 V
RG = 0.5 Ω
RT = 0.5 Ω
ISINK = 90 mA
VDROP = 480 mV (the compliance voltage specification at 90 mA)
Then the largest value of resistance of the voice coil, RC, is
=
×
+
×
+
=
SINK
G
SINK
T
SINK
DROP
BAT
C
I
R
I
R
I
V
R
)]
(
)
(
[
Ω
33.66
mA
90
Ω)]
0.5
mA
(90
2
mV
[480
V
3.6
=
×
+
For this reason, it is important to minimize any series impedance
on both the ground return path and interconnect between the
AD5821 and the motor. It is also important to note that for
lower values of ISINK, the compliance voltage of the output stage
also decreases. This decrease allows the user to either use voice
coil motors with high resistance values or decrease the power
supply voltage on the voice coil motor. The compliance voltage
decreases as the ISINK current decreases.
The power supply of the AD5821, or the regulator used to supply
the AD5821, should be decoupled. Best practice power supply
decoupling recommends that the power supply be decoupled
with a 10 μF capacitor. Ideally, this 10 μF capacitor should be of
a tantalum bead type. However, if the power supply or regulator
supply is well regulated and clean, such decoupling may not be
required. The AD5821 should be decoupled locally with a 0.1 μF
ceramic capacitor, and this 0.1 μF capacitor should be located as
close as possible to the VDD pin. The 0.1 μF capacitor should be
ceramic with a low effective series resistance and effective series
inductance. The 0.1 μF capacitor provides a low impedance path
to ground for high transient currents.
The power supply line should have as large a trace as possible to
provide a low impedance path and reduce glitch effects on the
supply line. Clocks and other fast switching digital signals should
be shielded from other parts of the board by digital ground.
Avoid crossover of digital and analog signals, if possible. When
traces cross on opposite sides of the board, they should run at
right angles to each other to reduce feedthrough effects through
the board. The best technique is to use a multilayer board with
ground and power planes, where the component side of the
board is dedicated to the ground plane only and the signal
traces are placed on the solder side. However, this is not always
possible with a 2-layer board.
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