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| 型号： | AD652JP |
| 厂商： | Analog Devices Inc |
| 文件页数： | 23/28页 |
| 文件大小： | 779K |
| 描述： | IC V-F CONV SYNCH MONO 5V 20PLCC |
| 标准包装： | 1 |
| 类型： | 电压至频率 |
| 频率 - 最大： | 2MHz |
| 全量程： | ±25ppm/°C |
| 线性： | ±0.005% |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-LCC（J 形引线） |
| 供应商设备封装： | 20-PLCC（9x9） |
| 包装： | 管件 |
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AD652
Rev. C | Page 23 of 28
DELTA MODULATOR
The circuit of Figure 34 shows the AD652 configured as a delta
modulator. A reference voltage is applied to the input of the
integrator (Pin 7), which sets the steady state output frequency
at one-half of the AD652 full-scale frequency (1/4 of the clock
frequency). As a 0 V to 10 V input signal is applied to the
comparator (Pin 15), the output of the integrator attempts to
track this signal. For an input in an idling condition (dc), the
output frequency is one-half full scale. For positive-going
signals, the output frequency is between one-half full scale and
full scale; for negative-going signals, the output frequency is
between zero and one-half full scale. The output frequency
corresponds to the slope of the comparator input signal.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ONE
SHOT
AND
"D"
FLOP
Q CK
D
Q
1mA
20k&
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
5V
REFERENCE
+15V
360pF
0.0047?/SPAN>F
15V
CLOCK
V
IN
(0V TO 10V
F
OUT
+5V
0.01?/SPAN>F
1k&
Figure 34. Delta Modulator
Since the output frequency corresponds to the slope of the input
signal, the delta modulator acts as a differentiator. A delta
modulator is thus a direct way of finding the derivative of a
signal. This is useful in systems where, for example, a signal
corresponding to velocity exists, and it is desired to determine
acceleration.
Figure 35 is a scope photo showing a 20 kHz, 0 V to 10 V sine
wave used as the input to the comparator and its ramp-wise
approximation at the integrator output. The clock frequency
used as 2 MHz and the integrating capacitor was 360 pF.
Figure 36 shows the same input signal and its ramp-wise
approximation, along with the output frequency corresponding
to the derivative of the input signal. In this case, the clock
frequency was 50 kHz.
The choice of an integrating capacitor is primarily dictated by
the input signal bandwidth. Figure 37 shows this relationship.
Note that as the value of CINT is lowered, the ramp size of the
integrator approximation becomes larger. This can be
compensated for by increasing the clock frequency. The effect of
the clock frequency on the ramp size is demonstrated in
Figure 35 and Figure 36.
Figure 35. Delta Modulator Input Signal and Ramp-Wise Approximation
Figure 36. Delta Modulator Input Signal Ramp-Wise Approximation and
Output Frequency
100
1k
10k
100
1k
10k
INPUT SIGNAL BANDWIDTH (Hz)
Figure 37. Maximum Integrating Cap Value vs. Input Signal Bandwidth
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| AD652JP-REEL | 功能描述:IC V-F CONV SYNCH MONO 5V 20PLCC RoHS:否 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD652JP-REEL7 | 功能描述:IC V-F CONV SYNCH MONO 5V 20PLCC RoHS:否 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD652JPZ | 功能描述:IC V-F CONV SYNCH MONO 5V 20PLCC RoHS:是 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD652JPZ-REEL | 功能描述:IC CONV VOLT-FREQ SYNC 20PLCC RoHS:是 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD652JPZ-REEL7 | 功能描述:IC CONV VOLT-FREQ SYNC 20PLCC RoHS:是 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
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