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| 型号： | AD670JNZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC ADC 8BIT SGNL COND 20-DIP |
| 标准包装： | 18 |
| 位数： | 8 |
| 采样率（每秒）： | 10k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 450mW |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 20-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 20-PDIP |
| 包装： | 管件 |
| 输入数目和类型： | 1 个差分，单极；1 个差分，双极 |
| 产品目录页面： | 777 (CN2011-ZH PDF) |
AD670
REV. A
–7–
Table III. AD670 TIMING SPECIFICATIONS
@ +25 C
Symbol
Parameter
Min
Typ
Max
Units
WRITE/CONVERT START MODE
tW
Write/Start Pulse Width
300
ns
tDS
Input Data Setup Time
200
ns
tDH
Input Data Hold
10
ns
tRWC
Read/Write Setup Before Control
0
ns
tDC
Delay to Convert Start
700
ns
tC
Conversion Time
10
s
READ MODE
tR
Read Time
250
ns
tSD
Delay from Status Low to Data Read
250
ns
tTD
Bus Access Time
200
250
ns
tDH
Data Hold Time
25
ns
tDT
Output Float Delay
150
ns
tRT
R/W before CE or CS low
0
ns
Boldface indicates parameters tested 100% unless otherwise noted. See Specifications page for explanation.
6b. Bipolar
6c. Full Scale (Unipolar)
Figure 6. Transfer Curves
CONTROL AND TIMING OF THE AD670
Control Logic
The AD670 contains on-chip logic to provide conversion and
data read operations from signals commonly available in micro-
processor systems. Figure 7 shows the internal logic circuitry of
the AD670. The control signals, CE, CS, and R/W control the
operation of the converter. The read or write function is deter-
mined by R/W when both CS and CE are low as shown in
Table II. If all three control inputs are held low longer than the
conversion time, the device will continuously convert until one
input, CE, CS, or R/W is brought high. The relative timing of
these signals is discussed later in this section.
Figure 7. Control Logic Block Diagram
Table II. AD670 Control Signal Truth Table
R/W
CS
CE
OPERATION
0
WRITE/CONVERT
1
0
READ
X
1
NONE
X
1
X
NONE
Timing
The AD670 is easily interfaced to a variety of microprocessors
and other digital systems. The following discussion of the timing
requirements of the AD670 control signals will provide the de-
signer with useful insight into the operation of the device.
Write/Convert Start Cycle
Figure 8 shows a complete timing diagram for the write/convert
start cycle. CS (chip select) and CE (chip enable) are active low
and are interchangeable signals. Both CS and CE must be low
for the converter to read or start a conversion. The minimum
pulse width, tW, on either CS or CE is 300 ns to start a
conversion.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD670JNZ | 制造商:Analog Devices 功能描述:IC 8-BIT ADC |
| AD670JP | 功能描述:IC ADC 8BIT SGNL COND 20-PLCC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| AD670JP-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 8-bit Parallel 20-Pin PLCC T/R |
| AD670JP-REEL7 | 制造商:Analog Devices 功能描述: |
| AD670JPZ | 功能描述:IC ADC 8BIT SIGNAL COND 20-PLCC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
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