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参数资料
| 型号： | AD7262BSTZ-RL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 25/33页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT W/PGA&COM 48-LQFP |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 1M |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 120mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 标准包装 |
| 输入数目和类型： | 2 个差分，单极 |
| 产品目录页面： | 777 (CN2011-ZH PDF) |
| 其它名称： | AD7262BSTZ-RL7DKR |
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AD7262
Rev. 0 | Page 30 of 32
APPLICATION HINTS
GROUNDING AND LAYOUT
The analog and digital supplies to the AD7262/AD7262-5 are
independent and separately pinned out to minimize coupling
between the analog and digital sections of the device. The
printed circuit board (PCB) that houses the AD7262/AD7262-5
should be designed so that the analog and digital sections are
separated and confined to certain areas of the board. This
design facilitates the use of ground planes that can be easily
separated.
To provide optimum shielding for ground planes, a minimum
etch technique is generally best. All five AGND pins of the
AD7262/AD7262-5 should be sunk in the AGND plane. Digital
and analog ground planes should be joined in only one place. If
the AD7262/AD7262-5 are in a system where multiple devices
require an AGND to DGND connection, the connection should
still be made at one point only, a star ground point, that should
be established as close as possible to the ground pins on the
AD7262/AD7262-5.
Avoid running digital lines under the device because this
couples noise onto the die. However, the analog ground plane
should be allowed to run under the AD7262/AD7262-5 to
avoid noise coupling. The power supply lines to the AD7262/
AD7262-5 should use as large a trace as possible to provide low
impedance paths and reduce the effects of glitches on the power
supply line.
To avoid radiating noise to other sections of the board, fast
switching signals, such as clocks, should be shielded with digital
ground, and clock signals should never run near the analog
inputs. Avoid crossover of digital and analog signals. To reduce
the effects of feedthrough within the board, traces on opposite
sides of the board should run at right angles to each other. A
microstrip technique is the best method but is not always possible
with a double-sided board. In this technique, the component
side of the board is dedicated to ground planes, while signals are
placed on the solder side.
Good decoupling is also important. All analog supplies should
be decoupled with 10 μF tantalum capacitors in parallel with
100 nF capacitors to GND. To achieve the best results from these
decoupling components, they must be placed as close as possible
to the device, ideally right up against the device. The 0.1 μF
capacitors should have low effective series resistance (ESR) and
effective series inductance (ESI), such as the common ceramic
types or surface-mount types. These low ESR and ESI capacitors
provide a low impedance path to ground at high frequencies to
handle transient currents due to internal logic switching.
PCB DESIGN GUIDELINES FOR LFCSP
The land on the chip scale packages (CP-48-1) are rectangular.
The PCB pad for these should be 0.1 mm longer than the
package land length and 0.05 mm wider than the package land
width, thereby having a portion of the pad exposed. To ensure
that the solder joint size is maximized, the land should be
centered on the pad.
The bottom of the chip scale package has a thermal pad. The
thermal pad on the PCB should be at least as large as the
exposed pad. On the PCB, there should be a clearance of at least
0.25 mm between the thermal pad and the inner edges of the
pad pattern to ensure that shorting is avoided.
To improve thermal performance of the package, use thermal
vias on the PCB, incorporating them into the thermal pad at
1.2 mm pitch grid. The via diameter should be between 0.3 mm
and 0.33 mm, and the via barrel should be plated with 1 oz.
copper to plug the via. The user should connect the PCB thermal
pad to AGND.
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