参数资料
型号: AD7266BCPZ-REEL7
厂商: Analog Devices Inc
文件页数: 14/29页
文件大小: 0K
描述: IC ADC 12BIT 2MSPS 3CH 32LFCSP
设计资源: AD7266 SAR ADC in DC-Coupled Differential and Single-Ended Appls (CN0039)
标准包装: 1
位数: 12
采样率(每秒): 2M
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 2
功率耗散(最大): 33.6mW
电压电源: 模拟和数字
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ(5x5)
包装: 标准包装
输入数目和类型: 12 个单端,单极;6 个差分,单极;6 个伪差分,单极
其它名称: AD7266BCPZ-REEL7DKR
AD7266
Rev. B | Page 20 of 28
FULL POWER-DOWN MODE
This mode is intended for use in applications where throughput
rates slower than those in the partial power-down mode are
required, as power-up from a full power-down takes substan-
tially longer than that from partial power-down. This mode is
more suited to applications where a series of conversions
performed at a relatively high throughput rate are followed by a
long period of inactivity and thus power-down. When the
AD7266 is in full power-down, all analog circuitry is powered
down. Full power-down is entered in a similar way as partial
power-down, except the timing sequence shown in Figure 35
must be executed twice. The conversion process must be
interrupted in a similar fashion by bringing CS high anywhere
after the second falling edge of SCLK and before the 10th falling
edge of SCLK. The device enters partial power-down at this
point. To reach full power-down, the next conversion cycle
must be interrupted in the same way, as shown in
.
Once
CS is brought high in this window of SCLKs, the part
completely powers down.
Note that it is not necessary to complete the 14 SCLKs once CS
is brought high to enter a power-down mode.
To exit full power-down and power up the AD7266, a dummy
conversion is performed, as when powering up from partial
power-down. On the falling edge of CS, the device begins to
power up and continues to power up, as long as CS is held low
until after the falling edge of the 10th SCLK. The required
power-up time must elapse before a conversion can be initiated,
as shown in
. See the
section for the
power-up times associated with the AD7266.
SCLK
CS
DOUTA
DOUTB
INVALID DATA
VALID DATA
110
14
1
THE PART BEGINS
TO POWER UP.
THE PART IS FULLY
POWERED UP; SEE
POWER-UP TIMES
SECTION.
tPOWER-UP1
04603-031
Figure 36. Exiting Partial Power-Down Mode
THREE-STATE
110
14
2
SCLK
CS
DOUTA
DOUTB
THREE-STATE
110
2
INVALID DATA
THE PART BEGINS
TO POWER UP.
THE PART ENTERS
PARTIAL POWER DOWN.
THE PART ENTERS
FULL POWER DOWN.
04603-032
14
Figure 37. Entering Full Power-Down Mode
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