参数资料
型号: AD7328BRUZ
厂商: Analog Devices Inc
文件页数: 25/37页
文件大小: 0K
描述: IC ADC 12BIT+ SAR 8CHAN 20TSSOP
设计资源: Using AD7328 in Appls with Single-Ended Industrial-Level Signals (CN0047)
标准包装: 75
系列: iCMOS®
位数: 12
采样率(每秒): 1M
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 30mW
电压电源: 双 ±
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 管件
输入数目和类型: 8 个单端,单极;8 个单端,双极;4 个差分,单极;4 个差分,双极
产品目录页面: 777 (CN2011-ZH PDF)
AD7328
Data Sheet
Rev. C | Page 30 of 36
POWER VS. THROUGHPUT RATE
The power consumption of the AD7328 varies with the throughput
rate. The static power consumed by the AD7328 is very low, and
significant power savings can be achieved as the throughput rate is
reduced. Figure 51 and Figure 52 show the power vs. throughput
rate for the AD7328 at a VCC of 3 V and 5 V, respectively. Both
plots clearly show that the average power consumed by the AD7328
is greatly reduced as the sample frequency is reduced. This is true
whether a fixed SCLK value is used or the SCLK value is scaled
with the sampling frequency. Figure 51 and Figure 52 show the
power consumption when operating the device in normal mode
for a fixed 20 MHz SCLK and a variable SCLK that scales with
the sampling frequency.
12
0
1100
04852-
052
THROUGHPUT RATE (kSPS)
A
VER
A
G
E
PO
W
ER
(m
W
)
10
8
6
4
2
100
200
300
400
500
600
700
800
900 1000
VARIABLE SCLK
20MHz SCLK
VCC = 3V
VDD/VSS = ±12V
TA = 25°C
INTERNAL REFERENCE
Figure 51. Power vs. Throughput Rate with 3 V VCC
20
0
1000
04852-
053
THROUGHPUT RATE (kHz)
A
VER
A
G
E
PO
W
ER
(m
W
)
18
16
14
12
10
8
6
4
2
100
200
300
400
500
600
700
800
900
20MHz SCLK
VARIABLE SCLK
VCC = 5V
VDD/VSS = ±12V
TA = 25°C
INTERNAL REFERENCE
Figure 52. Power vs. Throughput Rate with 5 V VCC
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