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参数资料
| 型号： | AD7329BRUZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/41页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT+SAR 8CHAN 24-TSSOP |
| 标准包装： | 1,000 |
| 位数： | 12 |
| 采样率（每秒）： | 1M |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 30mW |
| 电压电源： | 双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 8 个单端，单极；8 个单端，双极；4 个差分，单极；4 个差分，双极 |
| 配用： | EVAL-AD7329CBZ-ND - BOARD EVALUATION FOR AD7329CBZ |
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Data Sheet
AD7329
Rev. B | Page 19 of 40
D
VDD
ADCIN–
MUXOUT–
C2
R1
VIN–
VSS
C1
C3
C4
05402-
030
D
VDD
ADCIN+
MUXOUT+
C2
R1
VIN+
VSS
C1
C3
C4
Figure 31. Equivalent Analog Input Circuit, Differential Mode
Care should be taken to ensure that the analog input does not
exceed the VDD and VSS supply rails by more than 300 mV.
Exceeding this value causes the diodes to become forward
biased and to start conducting into either the VDD supply rail or
the VSS supply rail. These diodes can conduct up to 10 mA
without causing irreversible damage to the part.
In Figure 30 and Figure 31, Capacitor C1 is typically 4 pF and
can primarily be attributed to pin capacitance. Resistor R1 is a
lumped component made up of the on resistance of the input
multiplexer and the track-and-hold switch. Capacitor C2 is the
sampling capacitor; its capacitance varies depending on the
analog input range selected (see the Specifications section).
TRACK-AND-HOLD SECTION
The track-and-hold on the analog input of the AD7329 allows
the ADC to accurately convert an input sine wave of full-scale
amplitude to 13-bit accuracy. The input bandwidth of the track-
and-hold is greater than the Nyquist rate of the ADC. The
AD7329 can handle frequencies up to 20 MHz.
The ADCIN pins connect directly to the input stage of the track-
and-hold circuit. This is a high impedance input. Connecting
the MUXOUT pins directly to the ADCIN pins connects the
multiplexer output to the track-and-hold circuit. The input
voltage range on the ADCIN pins is determined by the range
register bits for the input channel selected. The user must
ensure that the input voltage to the ADCIN pins is within the
selected voltage range.
The track-and-hold enters its tracking mode on the 14th SCLK
rising edge after the CS falling edge. The time required to
acquire an input signal depends on how quickly the sampling
capacitor is charged. With zero source impedance, 300 ns is
sufficient to acquire the signal to the 13-bit level.
The acquisition time required is calculated using the following
formula:
tACQ = 10 × ((RSOURCE + R)C)
where C is the sampling capacitance, and R is the resistance
seen by the track-and-hold amplifier looking at the input.
For the AD7329, the value of R includes the on resistance of the
input multiplexer and is typically 300 . RSOURCE should include
any extra source impedance on the analog input.
When the AD7329 is run at a throughput rate of 1 MSPS with
a 20 MHz SCLK signal, the ADC has approximately 1.5 SCLK
periods plus t8 and the quiet time, tQUIET, to acquire the analog
input signal. The ADC goes back into hold mode on the CS
falling edge.
The current required to drive the ADC is extremely small when
using the external op amp between the MUXOUT and ADCIN
pins. This is due to the high input impedance of the op amp
placed between the MUXOUT and ADCIN pins. This can be seen
in Figure 32, where the current required to drive the AD7329
input is <0.2 μA when AD8021 is placed between the MUXOUT
and ADCIN pins.
0.20
0.14
0
1000
05402-
056
THROUGHPUT RATE (kSPS)
INP
UT
CURRE
NT
(
A)
0.19
0.18
0.17
0.16
0.15
100
200
300
400
500
600
700
800
900
VDD = 12V, VSS = –12V
VCC = VDRIVE = 5V
SINGLE-ENDED MODE
50kHz ON SELECTED CHANNEL
fIN = 50kHz
TA = 25°C
AD8021 BETWEEN MUXOUT
AND ADCIN PINS
Figure 32. Input Current vs. Throughput Rate
35
0
1000
05402-
057
THROUGHPUT RATE (kSPS)
INP
UT
CURRE
NT
(
A)
100
200
300
400
500
600
700
800
900
VDD = 12V, VSS = –12V
VCC = VDRIVE = 5V
SINGLE-ENDED MODE
50kHz ON SELECTED CHANNEL
fIN = 50kHz
TA = 25°C
WIRE LINK BETWEEN MUXOUT
AND ADCIN PINS
30
25
20
15
10
5
Figure 33. Input Current vs. Throughput Rate
with a Wire Link Between MUXOUT and ADCIN
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