参数资料
型号: AD73311ARS
厂商: ANALOG DEVICES INC
元件分类: 通信及网络
英文描述: Low Cost, Low Power CMOS General Purpose Analog Front End
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO20
封装: SSOP-20
文件页数: 24/36页
文件大小: 382K
代理商: AD73311ARS
REV. A
AD73311L
–24–
VINN
VINP
VOUTP
VOUTN
ELECTRET
MICROPHONE
10 F
R
A
R
B
R1
R2
5V
C2
C1
AD73311L
COTIME
LFILTER
REFCAP
REFOUT
REFERENCE
V
REF
0PGA
C
REFCAP
+6/
15dB
Figure 30. Electret Microphone Interface Circuit
Analog Output
The AD73311L
s differential analog output (VOUT) is pro-
duced by an on-chip differential ampli
fi
er. The differential
output can be ac-coupled or dc-coupled directly to a load that
can be a headset or the input of an external ampli
fi
er (the speci-
fi
ed minimum resistive load on the output section is 150
). It
is possible to connect the outputs in either a differential or a
single-ended con
fi
guration but please note that the effective
maximum output voltage swing (peak to peak) is halved in the
case of single-ended connection. Figure 31 shows a simple circuit
providing a differential output with ac coupling. The capacitors
in this circuit (C
OUT
) are optional; if used, their value can be
chosen as follows:
C
f
R
OUT
C
LOAD
=
1
2
π
where
f
C
= desired cutoff frequency.
CONTINUOUS
LFILTER
REFCAP
REFOUT
REFERENCE
C
REFCAP
C
OUT
R
LOAD
C
OUT
VINN
VINP
VOUTP
VOUTN
AD73311L
+6/
15dB
Figure 31. Example Circuit for Differential Output
Figure 32 shows an example circuit for providing a single-ended
output with ac coupling. The capacitor of this circuit (C
OUT
) is
not optional if dc current drain is to be avoided.
R
LOAD
C
OUT
CONTIME
LOW-PASS
FILTER
REFCAP
REFOUT
REFERENCE
C
REFCAP
VINN
VINP
VOUTP
VOUTN
AD73311L
+6/
15dB
Figure 32. Example Circuit for Single-Ended Output
Differential-to-Single-Ended Output
In some applications it may be desirable to convert the full
differential output of the decoder channel to a single-ended
signal. The circuit of Figure 33 shows a scheme for doing this.
R
LOAD
R
I
R
I
R
F
R
F
COTIME
LFILTER
REFCAP
REFOUT
REFERENCE
C
REFCAP
VINN
VINP
VOUTP
VOUTN
AD73311L
+6/
15dB
PGA
Figure 33. Example Circuit for Differential-to-Single-
Ended Output Conversion
Digital Interfacing
The AD73311L is designed to easily interface to most common
DSPs. The SCLK, SDO, SDOFS, SDI and SDIFS must be
connected to the SCLK, DR, RFS, DT and TFS pins of the
DSP respectively. The SE pin may be controlled from a parallel
output pin or flag pin such as FL0
2 on the ADSP-218x (or XF
on the TMS320C5x) or, where SPORT power-down is not
required, it can be permanently strapped high using a suitable
pull-up resistor. The
RESET
pin may be connected to the system
hardware reset structure or it may also be controlled using a
dedicated control line. In the event of tying it to the global sys-
tem reset, it is necessary to operate the device in mixed mode,
which allows a software reset, otherwise there is no convenient
way of resetting the device. Figures 34 and 35 show typical
connections to an ADSP-218x and TMS320C5x respectively.
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AD73311ARSZ 功能描述:IC ANALOG FRONT END 20-SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模拟前端 (AFE) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:- 通道数:2 功率(瓦特):- 电压 - 电源,模拟:3 V ~ 3.6 V 电压 - 电源,数字:3 V ~ 3.6 V 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN(5x5) 包装:带卷 (TR)
AD73311ARSZ-REEL 功能描述:IC ANALOG FRONT END 20-SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模拟前端 (AFE) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:- 通道数:2 功率(瓦特):- 电压 - 电源,模拟:3 V ~ 3.6 V 电压 - 电源,数字:3 V ~ 3.6 V 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN(5x5) 包装:带卷 (TR)
AD73311ARZ 功能描述:IC PROCESSOR FRONT END LP 20SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模拟前端 (AFE) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:- 通道数:2 功率(瓦特):- 电压 - 电源,模拟:3 V ~ 3.6 V 电压 - 电源,数字:3 V ~ 3.6 V 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN(5x5) 包装:带卷 (TR)
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