参数资料
型号: AD7366BRUZ-5
厂商: Analog Devices Inc
文件页数: 19/28页
文件大小: 0K
描述: IC ADC 12BIT DUAL 500KSPS 24-TSS
设计资源: Driving the AD7366/7 Bipolar SAR ADC in Low-Distortion DC-Coupled Appls (CN0042)
标准包装: 62
系列: iCMOS®
位数: 12
采样率(每秒): 500k
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 2
功率耗散(最大): 88.8mW
电压电源: 模拟和数字,双 ±
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 24-TSSOP
包装: 管件
输入数目和类型: 4 个单端,单极;4 个单端,双极
配用: EVAL-AD7366CBZ-ND - BOARD EVALUATION FOR AD7366
AD7366-5/AD7367-5
Rev. A | Page 26 of 28
Normal operation of the ESSI is selected by making MOD = 0 in
the CRB register. Set the word length to 16 by setting Bit WL1 = 1
and Bit WL0 = 0 in the CRA register. The FSP bit in the CRB
register should be set to 1 so that the frame sync is negative.
AD7366-5/AD7367-5 TO DSP563xx
The connection diagram in Figure 32 shows how the AD7366-5/
AD7367-5 can be connected to the enhanced synchronous
serial interface (ESSI) of the DSP563xx family of DSPs from
Motorola. There are two on-board ESSIs, and each is operated in
synchronous mode (Bit SYN = 1 in the CRB register) with
internally generated word length frame sync for both Tx and Rx
(Bit FSL1 = 0 and Bit FSL0 = 0 in the CRB register).
In Figure 32, the serial clock is taken from the ESSI0 so the SCK0
pin must be set as an output (SCKD = 1) while the SCK1 pin is set
as an input (SCKD = 0). The frame sync signal is taken from SC02
on ESSI0, so SCD2 = 1, while on ESSI1, SCD2 = 0; therefore, SC12
is configured as an input. The VDRIVE pin of the AD7366-5/
AD7367-5 takes the same supply voltage as that of the DSP563xx.
This allows the ADC to operate at a higher voltage than its
serial interface and, therefore, the DSP563xx, if necessary.
AD7366-5/
AD7367-5*
SCLK
DSP563xx*
SCK0
SC12
SRD1
SRD0
CS
DOUTA
DOUTB
*ADDITIONAL PINS OMITTED FOR CLARITY.
VDRIVE
VDD
SC02
SCK1
IRQn
PBn
CNVST
BUSY
06
84
2-
0
34
Figure 32. Interfacing the AD7366-5/AD7367-5 to the DSP563xx
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