参数资料
型号: AD7452BRTZ-R2
厂商: Analog Devices Inc
文件页数: 7/29页
文件大小: 0K
描述: IC ADC 12BIT 555KSPS SOT23-8
标准包装: 1
位数: 12
采样率(每秒): 555k
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 7.25mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-8
供应商设备封装: SOT-23-8
包装: 标准包装
输入数目和类型: 1 个差分,双极
产品目录页面: 777 (CN2011-ZH PDF)
其它名称: AD7452BRTZ-R2DKR
AD7452
Rev. B | Page 14 of 28
TYPICAL CONNECTION DIAGRAM
Figure 21 shows a typical connection diagram for the AD7452
for both 5 V and 3 V supplies. In this setup, the GND pin is
connected to the analog ground plane of the system. The VREF
pin is connected to either a 2.5 V or a 2 V decoupled reference
source, depending on the power supply, to set up the analog
input range. The common-mode voltage has to be set up
externally and is the value on which the two inputs are centered.
The conversion result is output in a 16-bit word with four
leading zeros followed by the MSB of the 12-bit result. For more
details on driving the differential inputs and setting up the
common mode, refer to the Driving Differential Inputs section.
SERIAL
INTERFACE
2V/2.5V
VREF
AD7452
C/P
0.1
F
3V/5V
SUPPLY
0.1
F
10
F
VDD
VIN+
VIN–
SCLK
SDATA
CS
GND
VREF
CM*
VREF
p-p
VREF
p-p
03154-A-021
*CM IS THE COMMON-MODE VOLTAGE.
Figure 21. Typical Connection Diagram
ANALOG INPUT
The analog input of the AD7452 is fully differential. Differential
signals have a number of benefits over single-ended signals,
including noise immunity based on the device’s common-mode
rejection, improvements in distortion performance, doubling of
the device’s available dynamic range, and flexibility in input
ranges and bias points. Figure 22 defines the fully differential
analog input of the AD7452.
VREF
p-p
VIN+
VIN–
AD7452
VREF
p-p
COMMON-
MODE
VOLTAGE
03154-A
-022
Figure 22. Differential Input Definition
The amplitude of the differential signal is the difference
between the signals applied to the VIN+ and VIN– pins
(i.e., VIN+ – VIN–). VIN+ and VIN– are simultaneously driven by two
signals, each of amplitude VREF, that are 180° out of phase. The
amplitude of the differential signal is therefore –VREF to +VREF
peak-to-peak (i.e., 2 ×VREF). This is true regardless of the
common mode (CM).
The common mode is the average of the two signals, i.e.,
(VIN+ + VIN–)/2, and is therefore the voltage upon which the two
inputs are centered. This results in the span of each input being
CM ± VREF/2. This voltage has to be set up externally, and its
range varies with VREF. As the value of VREF increases, the
common-mode range decreases. When driving the inputs with
an amplifier, the actual common-mode range is determined by
the amplifier’s output voltage swing.
Figure 23 and Figure 24 show how the common-mode range
typically varies with VREF for both 5 V and 3 V power supplies.
The common mode must be in this range to guarantee the
functionality of the AD7452.
For ease of use, the common mode can be set up to equal VREF,
resulting in the differential signal being ±VREF centered on VREF.
When a conversion takes place, the common mode is rejected,
resulting in a virtually noise-free signal of amplitude, –VREF to
+VREF, corresponding to the digital codes of 0 to 4096.
VREF (V)
2.5
0
0.5
1.0
1.5
2.0
2.5
C
O
M
ON
-M
OD
E
V
O
L
T
A
G
E
(
V
)
2.0
1.5
1.0
0.5
0
3.0
3.5
3.0
3.5
4.0
1.75V
3.25V
4.5
COMMON-MODE RANGE
03154-A
-023
Figure 23. Input Common-Mode Range vs. VREF
(VDD = 5 V and VREF (Max) = 3.5 V)
VREF (V)
1.5
0
0.25
0.50
0.75
1.00
1.25
C
O
MMO
N
-MO
D
E
V
O
L
T
A
G
E
(V
)
1.0
0.5
0
1.50
2.00
2.0
1V
2V
2.5
1.75
COMMON-MODE RANGE
03154-A
-024
Figure 24. Input Common-Mode Range vs. VREF
(VDD = 3 V and VREF (Max) = 2 V)
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