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| 型号： | AD7472BRUZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 2/21页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT PARALLEL 24TSSOP |
| 标准包装： | 62 |
| 位数： | 12 |
| 采样率（每秒）： | 1.5M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 12mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，单极 |
REV. B
AD7470/AD7472
–9–
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The end-
points of the transfer function are zero scale, a point 1/2 LSB
below the first code transition, and full scale, a point 1/2 LSB
above the last code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . . 000) to
(00 . . . 001) from the ideal, i.e., AGND + 0.5 LSB.
Gain Error
The last transition should occur at the analog value 1.5 LSB
below the nominal full scale. The first transition is a 0.5 LSB
above the low end of the scale (zero in the case of AD7470/
AD7472). The gain error is the deviation of the actual difference
between the first and last code transitions from the ideal differ-
ence between the first and last code transitions with offset errors
removed.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns into track mode after the
end of conversion. Track-and-Hold acquisition time is the time
required for the output of the track-and-hold amplifier to reach
its final value, within
±1 LSB, after the end of conversion.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the sum of all nonfundamental sig-
nals up to half the sampling frequency (fS/2), excluding dc. The
ratio is dependent on the number of quantization levels in the
digitization process; the more levels, the smaller the quantization
noise. The theoretical signal to (noise + distortion) ratio for an
ideal N-bit converter with a sine wave input is given by
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
Thus for a 12-bit converter, this is 74 dB and for a 10-bit con-
verter is 62 dB.
Total Harmonic Distortion (THD)
Total harmonic distortion is the ratio of the rms sum of har-
monics to the fundamental. For the AD7470/AD7472 it is
defined as
THD dB
VVVVV
V
()
log
()
=
++++
20
2
3
2
4
2
5
2
6
2
1
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5, and V6 are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is deter-
mined by the largest harmonic in the spectrum, but for ADCs
where the harmonics are buried in the noise floor, it will be a
noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation distortion terms are
those for which neither m nor n is equal to zero. For example,
the second-order terms include (fa + fb) and (fa – fb), while the
third-order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and
(fa – 2fb).
The AD7470/AD7472 are tested using the CCIF standard
where two input frequencies near the top end of the input band-
width are used. In this case, the second-order terms are usually
distanced in frequency from the original sine waves while the
third-order terms are usually at a frequency close to the input
frequencies. As a result, the second- and third-order terms are
specified separately. The calculation of the intermodulation
distortion is as per the THD specification where it is the ratio
of the rms sum of the individual distortion products to the rms
amplitude of the sum of the fundamentals expressed in dBs.
Aperture Delay
In a sample-and-hold, the time required after the hold command
for the switch to open fully is the aperture delay. The sample is,
in effect, delayed by this interval, and the hold command would
have to be advanced by this amount for precise timing.
Aperture Jitter
Aperture jitter is the range of variation in the aperture delay.
In other words, it is the uncertainty about when the sample is
taken. Jitter is the result of noise which modulates the phase
of the hold command. This specification establishes the ulti-
mate timing error, hence the maximum sampling frequency
for a given resolution. This error will increase as the input
dV/dt increases.
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相关代理商/技术参数 |
参数描述 |
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| AD7472BRUZ-REEL | 功能描述:IC ADC 12BIT PARALLEL 24TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
| AD7472BRUZ-REEL7 | 功能描述:IC ADC 12BIT PARALLEL 24TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
| AD7472BRZ | 功能描述:IC ADC 12BIT PARALLEL 24SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| AD7472YR | 制造商:Analog Devices 功能描述:ADC Single SAR 1.5Msps 12-bit Parallel 24-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:12 BIT 1.5MSPS PARALLEL ADC I.C. - Bulk |
| AD7472YR-REEL | 功能描述:IC ADC 12BIT PARALLEL 24-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
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