参数资料
型号: AD7658BSTZ
厂商: Analog Devices Inc
文件页数: 16/32页
文件大小: 0K
描述: IC ADC 12BIT 6CH 250KSPS 64LQFP
标准包装: 1
位数: 12
采样率(每秒): 250k
数据接口: 串行,并联
转换器数目: 6
功率耗散(最大): 143mW
电压电源: 模拟和数字,双 ±
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘
输入数目和类型: 6 个单端,双极
产品目录页面: 778 (CN2011-ZH PDF)
配用: EVAL-AD7658CBZ-ND - BOARD EVAL FOR AD7658
Data Sheet
AD7656/AD7657/AD7658
Rev. D | Page 23 of 32
The CS signal can be permanently tied low, and the RD signal
can be used to access the conversion results. A read operation
can take place after the BUSY signal goes low. The number of
required read operations depends on the number of ADCs that
are simultaneously sampled (see Figure 27). If CONVST A
and CONVST B are simultaneously brought low, four read
operations are required to obtain the conversion results from
V1, V2, V3, and V4. If CONVST A and CONVST C are
simultaneously brought low, four read operations are required
to obtain the conversion results from V1, V2, V5, and V6.
The conversion results are output in ascending order. For
the AD7657, DB15 and DB14 contain two leading zeros and
DB[13:0] output the 14-bit conversion result. For the AD7658,
DB[15:12] contain four leading zeros, and DB[11:0] output the
12-bit conversion result.
When using the three CONVST signals to independently
initiate conversions on the three ADC pairs, care should be
taken to ensure that a conversion is not initiated on a channel
pair when the BUSY signal is high. It is also recommended not
to initiate a conversion during a read sequence because doing so
can affect the performance of the conversion. For the specified
performance, it is recommended to perform the read after the
conversion. For unused input channel pairs, the associated
CONVSTx pin should be tied to VDRIVE.
If there is only an 8-bit bus available, the AD7656/AD7657/
AD7658 interface can be configured to operate in byte mode
(W/B = 1). In this configuration, the DB7/HBEN/DCEN pin
takes on its HBEN function. Each channel conversion result
from the AD7656/AD7657/AD7658 can be accessed in two
read operations, with 8 bits of data provided on DB15 to DB8
for each of the read operations (see Figure 28). The HBEN pin
determines whether the read operation first accesses the high
byte or the low byte of the 16-bit conversion result. To always
access the low byte first on DB15 to DB8, the HBEN pin should
be tied low. To always access the high byte first on DB15 to
DB8, the HBEN pin should be tied high. In byte mode when all
three CONVST pins are pulsed together to initiate simultaneous
conversions on all six ADCs, 12 read operations are necessary
to read back the six 16-/14-/12-bit conversion results. DB[6:0]
should be left unconnected in byte mode.
V1
V2
V3
V4
V5
V6
CONVST A,
CONVST B,
CONVST C
BUSY
CS
RD
DB0 TO DB15
tQUIET
t7
t8
t9
t4
t2
t3
t5
t6
tACQ
tCONVERT
05020-
007
t10
Figure 27. Parallel Interface Timing Diagram (W/B = 0)
LOW BYTE
HIGH BYTE
DB15 TO DB8
CS
RD
t3
t6
t7
t8
t4
t5
t9
05020-
008
Figure 28. Parallel Interface—Read Cycle for Byte Mode of Operation (W/B = 1, HBEN = 0)
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