参数资料
| 型号： | AD7762BSVZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/29页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 625KSPS 64TQFP |
| 标准包装： | 1,500 |
| 位数： | 24 |
| 采样率（每秒）： | 625k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 958mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-TQFP 裸露焊盘 |
| 供应商设备封装： | 64-TQFP-EP（10x10） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，单极；1 个差分，双极 |
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Data Sheet
AD7762
Rev. A | Page 17 of 28
The sampling switches SS1 and SS3 are driven by ICLK, whereas
the sampling switches SS2 and SS4 are driven by ICLK. When
ICLK is high, the analog input voltage is connected to CS1. On
the falling edge of ICLK, the SS1 and SS3 switches open, and the
analog input is sampled on CS1. Similarly, when ICLK is low, the
analog input voltage is connected to CS2. On the rising edge of
ICLK, the SS2 and SS4 switches open, and the analog input is
sampled on CS2.
Capacitors CPA, CPB1, and CPB2 represent parasitic capacitances
that include the junction capacitances associated with the MOS
switches.
Table 9. Equivalent Component Values
Mode
CS1
CS2
CPA
CPB1/2
Normal
51 pF
12 pF
20 pF
Low Power
13 pF
12 pF
5 pF
USING THE AD7762
The following is the recommended sequence for powering up
and using the AD7762.
1. Apply power.
2. Start the clock oscillator, applying MCLK.
3. Take RESET low for a minimum of 1 MCLK cycle.
4. Wait a minimum of 2 MCLK cycles after RESET has been
released.
5. Write to Control Register 2 to power up the ADC and the
differential amplifier as required. The correct clock divider
(CDIV) ratio should be programmed now.
6. Write to Control Register 1 to set the output data rate.
7. Wait a minimum of 5 MCLK cycles after CS has been
released.
8. Take SYNC low for a minimum of 4 MCLK cycles, if
required, to synchronize multiple parts.
Data can then be read from the part using the default filter,
offset, gain, and overrange threshold values. The conversion
data read is not valid, however, until the group delay of the filter
has passed. When this has occurred, the DVALID bit read with
the data LSW is set, indicating that the data is indeed valid.
The user can then download a different filter, if required
(see Downloading a User-Defined Filter). Values for gain, offset,
and overrange threshold registers can be written or read at this
stage.
BIAS RESISTOR SELECTION
The AD7762 requires a resistor to be connected between the
RBIAS pin and AGND1. The value for this resistor is dependant
on the reference voltage being applied to the device. The resistor
value should be selected to give a current of 25 A through the
resistor to ground. For a 2.5 V reference voltage, the correct
resistor value is 100 k and for a 4.096 V reference, the correct
resistor value is 160 k.
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| AD7763 | 制造商:AD 制造商全称:Analog Devices 功能描述:24-Bit, 8.5 mW, 109 dB, 128/64/32 kSPS ADCs |
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| AD7763BSVZ | 功能描述:IC ADC 24BIT SRL 625KSPS 64TQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| AD7763BSVZ-REEL | 功能描述:IC ADC 24BIT S/D 625KSPS 64-TQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
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