参数资料
型号: AD7856KRZ
厂商: Analog Devices Inc
文件页数: 12/32页
文件大小: 0K
描述: IC ADC 14BIT 8CHAN 5V 24SOIC
标准包装: 31
位数: 14
采样率(每秒): 285k
数据接口: 8051,QSPI?,串行,SPI? µP
转换器数目: 2
功率耗散(最大): 89.25mW
电压电源: 模拟和数字
工作温度: 0°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC W
包装: 管件
输入数目和类型: 8 个单端,单极;4 个伪差分,单极
–2–
REV. A
AD7856–SPECIFICATIONS1, 2
Parameter
A Version
1
K Version
1
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
fIN = 10 kHz
Signal to Noise + Distortion Ratio
3 (SNR)
78
dB min
79.5 dB typ
Total Harmonic Distortion (THD)
–86
dB max
–95 dB typ
Peak Harmonic or Spurious Noise
–87
dB max
–95 dB typ
Intermodulation Distortion (IMD)
Second Order Terms
–86
–90
dB typ
fa = 9.983 kHz, fb = 10.05 kHz
Third Order Terms
–86
–90
dB typ
fa = 9.983 kHz, fb = 10.05 kHz
Channel-to-Channel Isolation
–90
dB typ
VIN = 25 kHz
DC ACCURACY
Any Channel
Resolution
14
Bits
Integral Nonlinearity
±2
LSB max
4.096 V External Reference, VDD = 5 V
±2
LSB typ
Differential Nonlinearity
±2
LSB max
Guaranteed No Missed Codes to 13 Bits.
±2
LSB typ
Offset Error
±10
LSB max
±10
±5
LSB typ
Offset Error Match
±3
LSB max
Positive Full-Scale Error
±10
LSB max
±10
LSB typ
Positive Full-Scale Error Match
±2
LSB max
ANALOG INPUT
Input Voltage Ranges
0 to VREF
Volts
i.e., AIN(+) – AIN(–) = 0 to VREF, AIN(–) Can Be
Biased Up, but AIN(+) Cannot Go Below AIN(–)
Leakage Current
±1
A max
Input Capacitance
20
pF typ
REFERENCE INPUT/OUTPUT
REFIN Input Voltage Range
4.096/VDD
2.3/VDD
V min/max
Functional from 1.2 V
Input Impedance
150
k
typ
Resistor Connected to Internal Reference Node
REFOUT Output Voltage
3.696/4.496
V min/max
REFOUT Tempco
20
ppm/
°C typ
LOGIC INPUTS
Input High Voltage, VINH
VDD – 1.0
V min
Input Low Voltage, VINL
0.4
V max
Input Current, IIN
±1
A max
Typically 10 nA, VIN = 0 V or VDD
Input Capacitance, CIN
4
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
VDD – 0.4
V min
ISOURCE = 200 A
Output Low Voltage, VOL
0.4
V max
ISINK = 0.8 mA
Floating-State Leakage Current
±1
A max
Floating-State Output Capacitance
4
10
pF max
Output Coding
Straight (Natural) Binary
CONVERSION RATE
Conversion Time
3.5
5.25
s max
21 CLKIN Cycles
Track/Hold Acquisition Time
0.33
0.5
s min
A Grade: fCLKIN = 6 MHz, (–40 C to +105 C), fSAMPLE = 285 kHz; K Grade:
fCLKIN = 4 MHz, (0 C to +105 C), fSAMPLE = 102 kHz; (AVDD = DVDD = +5.0 V
5%,
REFIN/REFOUT = 4.096 V External Reference unless otherwise noted, SLEEP = Logic High; TA = TMIN to TMAX, unless otherwise noted.) Specifica-
tions apply for Mode 2 operation, standard 3-wire SPI interface; refer to Detailed Timing section for Mode 1 Specifications.
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