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| 型号： | AD7866ARUZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 2CHAN DUAL 20TSSOP |
| 标准包装： | 2,500 |
| 位数： | 12 |
| 采样率（每秒）： | 1M |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 24mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 4 个单端，单极 |
| 配用： | EVAL-AD7866CBZ-ND - BOARD EVALUATION AD7866 |
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
2003 Analog Devices, Inc. All rights reserved.
AD7866
Dual 1 MSPS, 12-Bit, 2-Channel
SAR ADC with Serial Interface
FEATURES
Dual 12-Bit, 2-Channel ADC
Fast Throughput Rate: 1 MSPS
Specified for VDD of 2.7 V to 5.25 V
Low Power
11.4 mW Max at 1 MSPS with 3 V Supplies
24 mW Max at 1 MSPS with 5 V Supplies
Wide Input Bandwidth
70 dB SNR at 300 kHz Input Frequency
On-Board Reference 2.5 V
–40 C to +125 C Operation
Flexible Power/Throughput Rate Management
Simultaneous Conversion/Read
No Pipeline Delays
High Speed Serial Interface SPITM/QSPITM/
MICROWIRE
TM/DSP Compatible
Shutdown Mode: 1
A Max
20-Lead TSSOP Package
FUNCTIONAL BLOCK DIAGRAM
VA2
VA1
DGND
DOUTA
REF SELECT
VREF
A0
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
AD7866
2.5V
REF
T/H
MUX
BUF
OUTPUT
DRIVERS
RANGE
SCLK
CS
CONTROL
LOGIC
VB2
VB1
DOUTB
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
T/H
MUX
OUTPUT
DRIVERS
BUF
DCAPAAVDD
DVDD
DCAPB
AGND
VDRIVE
GENERAL DESCRIPTION
The AD7866 is a dual 12-bit high speed, low power, successive
approximation ADC. The part operates from a single 2.7 V to
5.25 V power supply and features throughput rates up to 1 MSPS.
The device contains two ADCs, each preceded by a low noise,
wide bandwidth track-and-hold amplifier that can handle
input frequencies in excess of 10 MHz.
The conversion process and data acquisition are controlled
using standard control inputs, allowing easy interfacing to
microprocessors or DSPs. The input signal is sampled on the
falling edge of
CS; conversion is also initiated at this point.
The conversion time is determined by the SCLK frequency.
There are no pipelined delays associated with the part.
The AD7866 uses advanced design techniques to achieve
very low power dissipation at high throughput rates. With 3 V
supplies and 1 MSPS throughput rate, the part consumes a
maximum of 3.8 mA. With 5 V supplies and 1 MSPS, the
current consumption is a maximum of 4.8 mA. The part also
offers flexible power/throughput rate management when
operating in sleep mode.
The analog input range for the part can be selected to be a 0 V
to VREF range or a 2
VREF range with either straight binary or
twos complement output coding. The AD7866 has an on-chip
2.5 V reference that can be overdriven if an external reference
is preferred. Each on-board ADC can also be supplied with a
separate individual external reference.
The AD7866 is available in a 20-lead thin shrink small outline
(TSSOP) package.
PRODUCT HIGHLIGHTS
1. The AD7866 features two complete ADC functions, allowing
simultaneous sampling and conversion of two channels. Each
ADC has a 2-channel input multiplexer. The conversion result
of both channels is available simultaneously on separate data
lines, or may be taken on one data line if only one serial port
is available.
2. High Throughput with Low Power Consumption—The
AD7866 offers a 1 MSPS throughput rate with 11.4 mW
maximum power consumption when operating at 3 V.
3. Flexible Power/Throughput Rate Management—The conver-
sion rate is determined by the serial clock, allowing the power
consumption to be reduced as the conversion time is reduced
through a SCLK frequency increase. Power efficiency can be
maximized at lower throughput rates if the part enters sleep
during conversions.
4. No Pipeline Delay—The part features two standard successive
approximation ADCs with accurate control of the sampling
instant via a
CS input and once off conversion control.
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