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| 型号： | AD7898ARZ-3 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT SRL HS 5V 8SOIC |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 220k |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 22.5mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，双极 |
–5–
REV. A
AD7898
PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
REF IN
Voltage Reference Input. An external reference source should be connected to this pin to provide the
reference voltage for the AD7898’s conversion process. The REF IN input is buffered on-chip. The
nominal reference voltage for correct operation of the AD7898 is 2.5 V
± 5%. A 0.1 F capacitor
should be placed on the REF IN pin.
2VIN
Analog Input Channel. The analog input range is
±10 V (AD7898-10) and ±2.5 V (AD7898-3).
3
GND
Analog Ground. Ground reference for track/hold, comparator, digital circuitry, and DAC.
4
SCLK
Serial Clock Input. An external serial clock is applied to this input to obtain serial data from the AD7898.
When in Mode 0 operation, a new serial data bit is clocked out on the falling edge of this serial clock.
In Mode 0, data is guaranteed valid for 20 ns after this falling edge so that data can be accepted on the
falling edge when a fast serial clock is used. The serial clock input should be taken low at the end of
the serial data transmission. When in Mode 1 operation, SCLK also provides the serial clock for
accessing data from the part as in Mode 0, but this clock input is also used as the clock source for the
AD7898’s conversion process when in Mode 1.
5
SDATA
Serial Data Output. Serial data from the AD7898 is provided at this output. The serial data is clocked
out by the falling edge of SCLK, but the data can also be read on the falling edge of SCLK. This is
possible because data bit N is valid for a specified time after the falling edge of SCLK (data hold time).
Sixteen bits of serial data are provided with four leading zeros followed by the 12 bits of conversion data,
which is provided MSB first. On the 16th falling edge of SCLK, the SDATA line is held for the data
hold time and then is disabled (three-stated). Output data coding is two’s complement for the AD7898.
6VDRIVE
Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the serial inter-
face of the AD7898 will operate.
7
CS/CONVST
Chip Select/Convert Start. This pin is
CONVST, an edge-triggered logic input when in Mode 0 operation.
On the falling edge of this input, the track/hold goes into its hold mode, and conversion is initiated.
When in Mode 1 operation, this pin is Chip Select, an active low logic input. This input provides the
dual function of initiating conversions on the AD7898 and also frames the serial data transfer.
8VDD
Power Supply Input, 5 V
± 5%.
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相关代理商/技术参数 |
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| AD7899AR-1 | 功能描述:IC ADC 14BIT 400KSPS 5V 28-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| AD7899AR-1REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 400ksps 14-bit Parallel 28-Pin SOIC W T/R |
| AD7899AR-1REEL7 | 制造商:Analog Devices 功能描述:ADC SGL SAR 400KSPS 14BIT PARALLEL 28SOIC W - Tape and Reel |
| AD7899AR-2 | 功能描述:IC ADC 14BIT 400KSPS 5V 28-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| AD7899AR-2REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 400ksps 14-bit Parallel 28-Pin SOIC W T/R |
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