参数资料
型号: AD7944BCPZ
厂商: Analog Devices Inc
文件页数: 7/28页
文件大小: 0K
描述: IC ADC 14BIT 2.5MSPS 20LFCSP
标准包装: 1
系列: PulSAR®
位数: 14
采样率(每秒): 2.5M
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 33mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘,CSP
供应商设备封装: 20-LFCSP-VQ
包装: 托盘
输入数目和类型: 1 个伪差分,单极
产品目录页面: 780 (CN2011-ZH PDF)
AD7944
Rev. A | Page 15 of 28
ANALOG INPUTS
Figure 24 shows an equivalent circuit of the analog input
structure of the AD7944.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs, IN+ and IN. Care must be taken to ensure that
the analog input signal does not exceed the reference input
voltage (VREF) by more than 0.3 V. If the analog input signal
exceeds this level, the diodes become forward-biased and start
conducting current. These diodes can handle a forward-biased
current of 130 mA maximum. However, if the supplies of the
input buffer (for example, the V+ and V supplies of the buffer
amplifier in Figure 23) are different from those of REF, the
analog input signal may eventually exceed the supply rails by
more than 0.3 V. In such a case (for example, an input buffer
with a short circuit), the current limitation can be used to
protect the part.
CPIN
REF
RIN
CIN
D1
D2
IN+ OR IN–
REFGND
04658-
008
Figure 24. Equivalent Analog Input Circuit
The analog input structure allows the sampling of the true
differential signal between IN+ and IN. By using these
differential inputs, signals common to both inputs are rejected.
During the acquisition phase, the impedance of the analog inputs
(IN+ and IN) can be modeled as a parallel combination of
Capacitor CPIN and the network formed by the series connection
of RIN and CIN. CPIN is primarily the pin capacitance. RIN is typically
400 and is a lumped component composed of serial resistors
and the on resistance of the switches. CIN is typically 30 pF and
is mainly the ADC sampling capacitor.
During the sampling phase, where the switches are closed, the
input impedance is limited to CPIN. RIN and CIN make a one-pole,
low-pass filter that reduces undesirable aliasing effects and
limits noise.
When the source impedance of the driving circuit is low, the
AD7944 can be driven directly. Large source impedances
significantly affect the ac performance, especially THD. The
dc performances are less sensitive to the input impedance. The
maximum source impedance depends on the amount of THD
that can be tolerated. The THD degrades as a function of the
source impedance and the maximum input frequency.
DRIVER AMPLIFIER CHOICE
Although the AD7944 is easy to drive, the driver amplifier must
meet the following requirements:
The noise generated by the driver amplifier must be kept as
low as possible to preserve the SNR and transition noise
performance of the AD7944. The noise from the driver is
filtered by the AD7944 analog input circuit’s one-pole, low-
pass filter, made by RIN and CIN, or by the external filter, if
one is used. Because the typical noise of the AD7944 is
225 V rms, the SNR degradation due to the amplifier is
+
=
2
)
(
2
π
225
20log
(dB)
N
dB
3
LOSS
Ne
f
SNR
where:
f3 dB is the input bandwidth, in MHz, of the AD7944
(19 MHz) or the cutoff frequency of the input filter, if
one is used.
N is the noise gain of the amplifier (for example, 1 in buffer
configuration).
eN is the equivalent input noise voltage of the op amp, in
nV/√Hz.
For ac applications, the driver should have a THD perfor-
mance commensurate with that of the AD7944.
For multichannel multiplexed applications, the driver
amplifier and the AD7944 analog input circuit must settle
for a full-scale step onto the capacitor array at a 14-bit level
(0.0061%, 61 ppm). In the data sheet of the driver amplifier,
settling at 0.1% to 0.01% is more commonly specified. This
value can differ significantly from the settling time at a
14-bit level and should be verified prior to driver selection.
Table 8. Recommended Driver Amplifiers
Amplifier
Typical Application
Very low noise and high frequency
Low noise and high frequency
Ultralow noise and high frequency
Low power and high frequency
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